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git01.mediatek.com / filogic / atf / 1f56fb1d6f7b125920d5d0e518f7a73f3fb3b102 / . / plat / intel / soc / stratix10 / platform.mk
blob: e7251c42884959733ab4869b1c3a0de6d7cd6609 [file] [log] [blame]
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]1#
2# Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]3# Copyright (c) 2019, Intel Corporation. All rights reserved.
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]4#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8PLAT_INCLUDES := \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]9 -Iplat/intel/soc/stratix10/include/ \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]12
13PLAT_BL_COMMON_SOURCES := \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]14 drivers/arm/gic/common/gic_common.c \
15 drivers/arm/gic/v2/gicv2_main.c \
16 drivers/arm/gic/v2/gicv2_helpers.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]17 drivers/delay_timer/delay_timer.c \
18 drivers/delay_timer/generic_delay_timer.c \
19 drivers/ti/uart/aarch64/16550_console.S \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]20 lib/xlat_tables/aarch64/xlat_tables.c \
21 lib/xlat_tables/xlat_tables_common.c \
22 plat/common/plat_gicv2.c \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]23 plat/intel/soc/common/aarch64/platform_common.c \
24 plat/intel/soc/common/aarch64/plat_helpers.S
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]25
26BL2_SOURCES += \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]27 common/desc_image_load.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]28 drivers/mmc/mmc.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]29 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]30 drivers/io/io_storage.c \
31 drivers/io/io_block.c \
32 drivers/io/io_fip.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]33 drivers/partition/partition.c \
34 drivers/partition/gpt.c \
35 drivers/synopsys/emmc/dw_mmc.c \
36 lib/cpus/aarch64/cortex_a53.S \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]37 plat/intel/soc/stratix10/bl2_plat_setup.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]38 plat/intel/soc/stratix10/soc/s10_clock_manager.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]39 plat/intel/soc/stratix10/soc/s10_memory_controller.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]40 plat/intel/soc/stratix10/soc/s10_pinmux.c \
41 plat/intel/soc/stratix10/soc/s10_reset_manager.c \
42 plat/intel/soc/stratix10/soc/s10_system_manager.c \
43 plat/intel/soc/common/bl2_plat_mem_params_desc.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]44 plat/intel/soc/common/socfpga_delay_timer.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]45 plat/intel/soc/common/socfpga_image_load.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]46 plat/intel/soc/common/socfpga_storage.c \
47 plat/intel/soc/common/soc/socfpga_handoff.c \
Hadi Asyrafi6f8a2b22019-10-23 18:34:14 +0800[diff] [blame]48 plat/intel/soc/common/soc/socfpga_mailbox.c \
Hadi Asyrafic461add2019-06-12 11:24:12 +0800[diff] [blame]49 plat/intel/soc/common/drivers/qspi/cadence_qspi.c \
50 plat/intel/soc/common/drivers/wdt/watchdog.c
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]51
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]52BL31_SOURCES += \
53 drivers/arm/cci/cci.c \
54 lib/cpus/aarch64/aem_generic.S \
Tien Hock, Lohab34f742019-02-26 09:25:14 +0800[diff] [blame]55 lib/cpus/aarch64/cortex_a53.S \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]56 plat/common/plat_psci_common.c \
57 plat/intel/soc/stratix10/bl31_plat_setup.c \
58 plat/intel/soc/common/socfpga_psci.c \
59 plat/intel/soc/common/socfpga_sip_svc.c \
60 plat/intel/soc/common/socfpga_topology.c \
61 plat/intel/soc/common/soc/socfpga_mailbox.c \
Loh Tien Hock59400a42019-02-04 16:17:24 +0800[diff] [blame]62
63PROGRAMMABLE_RESET_ADDRESS := 0
64BL2_AT_EL3 := 1
Tien Hock, Lohab34f742019-02-26 09:25:14 +0800[diff] [blame]65USE_COHERENT_MEM := 1