Tony K Nadackal | a81a3d9 | 2021-11-24 16:09:26 +0000 | [diff] [blame] | 1 | # Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved. |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 2 | # |
| 3 | # SPDX-License-Identifier: BSD-3-Clause |
| 4 | # |
| 5 | |
Tony K Nadackal | a81a3d9 | 2021-11-24 16:09:26 +0000 | [diff] [blame] | 6 | RD_N2_VARIANTS := 0 1 2 3 |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 7 | ifneq ($(CSS_SGI_PLATFORM_VARIANT),\ |
| 8 | $(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS))) |
Tony K Nadackal | a81a3d9 | 2021-11-24 16:09:26 +0000 | [diff] [blame] | 9 | $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, 1, 2 or 3, currently \ |
| 10 | set to ${CSS_SGI_PLATFORM_VARIANT}.") |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 11 | endif |
| 12 | |
| 13 | $(eval $(call CREATE_SEQ,SEQ,4)) |
| 14 | ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ))) |
| 15 | $(error "Chip count for RD-N2-MC should be either $(SEQ) \ |
| 16 | currently it is set to ${CSS_SGI_CHIP_COUNT}.") |
| 17 | endif |
| 18 | |
Andre Przywara | b6c24ce | 2021-07-20 19:20:07 +0100 | [diff] [blame] | 19 | # RD-N2 platform uses GIC-700 which is based on GICv4.1 |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 20 | GIC_ENABLE_V4_EXTN := 1 |
Vivek Gautam | 44a9151 | 2022-09-14 13:44:52 +0530 | [diff] [blame] | 21 | GIC_EXT_INTID := 1 |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 22 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 23 | #Enable GIC Multichip Extension only for Multichip Platforms |
| 24 | ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2) |
| 25 | GICV3_IMPL_GIC600_MULTICHIP := 1 |
| 26 | endif |
| 27 | |
Pranav Madhu | 078dc52 | 2022-07-27 14:01:24 +0530 | [diff] [blame] | 28 | override CSS_SYSTEM_GRACEFUL_RESET := 1 |
| 29 | override EL3_EXCEPTION_HANDLING := 1 |
| 30 | |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 31 | include plat/arm/css/sgi/sgi-common.mk |
| 32 | |
| 33 | RDN2_BASE = plat/arm/board/rdn2 |
| 34 | |
| 35 | PLAT_INCLUDES += -I${RDN2_BASE}/include/ |
| 36 | |
Tony K Nadackal | e23ca81 | 2021-08-19 14:44:11 +0100 | [diff] [blame] | 37 | SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n2.S \ |
Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 38 | lib/cpus/aarch64/neoverse_v2.S |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 39 | |
| 40 | PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat_v2.c |
| 41 | |
| 42 | BL1_SOURCES += ${SGI_CPU_SOURCES} \ |
| 43 | ${RDN2_BASE}/rdn2_err.c |
| 44 | |
| 45 | BL2_SOURCES += ${RDN2_BASE}/rdn2_plat.c \ |
| 46 | ${RDN2_BASE}/rdn2_security.c \ |
| 47 | ${RDN2_BASE}/rdn2_err.c \ |
| 48 | lib/utils/mem_region.c \ |
| 49 | drivers/arm/tzc/tzc400.c \ |
| 50 | plat/arm/common/arm_tzc400.c \ |
| 51 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 52 | |
| 53 | BL31_SOURCES += ${SGI_CPU_SOURCES} \ |
| 54 | ${RDN2_BASE}/rdn2_plat.c \ |
| 55 | ${RDN2_BASE}/rdn2_topology.c \ |
| 56 | drivers/cfi/v2m/v2m_flash.c \ |
| 57 | lib/utils/mem_region.c \ |
| 58 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 59 | |
| 60 | ifeq (${TRUSTED_BOARD_BOOT}, 1) |
| 61 | BL1_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c |
| 62 | BL2_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c |
| 63 | endif |
| 64 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 65 | ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2) |
| 66 | BL31_SOURCES += drivers/arm/gic/v3/gic600_multichip.c |
| 67 | |
| 68 | # Enable dynamic addition of MMAP regions in BL31 |
| 69 | BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC |
| 70 | endif |
| 71 | |
Omkar Anand Kulkarni | 1f42599 | 2023-06-22 15:18:07 +0530 | [diff] [blame^] | 72 | ifeq (${RAS_FFH_SUPPORT},1) |
| 73 | BL31_SOURCES += ${RDN2_BASE}/rdn2_ras.c \ |
| 74 | ${CSS_ENT_BASE}/ras/sgi_ras_common.c \ |
| 75 | ${CSS_ENT_BASE}/ras/sgi_ras_sram.c |
| 76 | endif |
| 77 | |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 78 | # Add the FDT_SOURCES and options for Dynamic Config |
| 79 | FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_fw_config.dts \ |
| 80 | ${RDN2_BASE}/fdts/${PLAT}_tb_fw_config.dts |
| 81 | FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb |
| 82 | TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb |
| 83 | |
| 84 | # Add the FW_CONFIG to FIP and specify the same to certtool |
| 85 | $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) |
| 86 | # Add the TB_FW_CONFIG to FIP and specify the same to certtool |
| 87 | $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) |
| 88 | |
| 89 | FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_nt_fw_config.dts |
| 90 | NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb |
| 91 | |
| 92 | # Add the NT_FW_CONFIG to FIP and specify the same to certtool |
| 93 | $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config)) |
| 94 | |
| 95 | override CTX_INCLUDE_AARCH32_REGS := 0 |
Andre Przywara | 0b7f1b0 | 2023-03-21 13:53:19 +0000 | [diff] [blame] | 96 | override ENABLE_FEAT_AMU := 1 |