blob: 19293bfe774070e1e5be2882c0ea9e6055a36a4f [file] [log] [blame]
Anson Huang4c28fc32018-06-05 16:12:27 +08001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <asm_macros.S>
8#include <platform_def.h>
9#include <cortex_a35.h>
10
11 .globl plat_is_my_cpu_primary
12 .globl plat_my_core_pos
13 .globl plat_calc_core_pos
14 .globl plat_reset_handler
15 .globl plat_get_my_entrypoint
16 .globl plat_secondary_cold_boot_setup
17 .globl plat_crash_console_init
18 .globl plat_crash_console_putc
Antonio Nino Diaz1eb64a12018-10-17 15:29:34 +010019 .globl plat_crash_console_flush
Anson Huang4c28fc32018-06-05 16:12:27 +080020 .globl platform_mem_init
21 .globl imx_mailbox_init
22
23 /* --------------------------------------------------------------------
24 * Helper macro that reads the part number of the current CPU and jumps
25 * to the given label if it matches the CPU MIDR provided.
26 *
27 * Clobbers x0.
28 * --------------------------------------------------------------------
29 */
30 .macro jump_if_cpu_midr _cpu_midr, _label
31
32 mrs x0, midr_el1
33 ubfx x0, x0, MIDR_PN_SHIFT, #12
34 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
35 b.eq \_label
36
37 .endm
38
39 /* ----------------------------------------------
40 * The mailbox_base is used to distinguish warm/cold
41 * reset. The mailbox_base is in the data section, not
42 * in .bss, this allows function to start using this
43 * variable before the runtime memory is initialized.
44 * ----------------------------------------------
45 */
46 .section .data.mailbox_base
47 .align 3
48 mailbox_base: .quad 0x0
49
50 /* ----------------------------------------------
51 * unsigned int plat_is_my_cpu_primary(void);
52 * This function checks if this is the primary CPU
53 * ----------------------------------------------
54 */
55func plat_is_my_cpu_primary
56 mrs x0, mpidr_el1
57 and x0, x0, #(MPIDR_CPU_MASK)
58 cmp x0, #PLAT_PRIMARY_CPU
59 cset x0, eq
60 ret
61endfunc plat_is_my_cpu_primary
62
63 /* ----------------------------------------------
64 * unsigned int plat_my_core_pos(void)
65 * This Function uses the plat_calc_core_pos()
66 * to get the index of the calling CPU.
67 * ----------------------------------------------
68 */
69func plat_my_core_pos
70 mrs x0, mpidr_el1
71 and x1, x0, #MPIDR_CPU_MASK
72 and x0, x0, #MPIDR_CLUSTER_MASK
73 add x0, x1, x0, LSR #6
74 ret
75endfunc plat_my_core_pos
76
77 /*
78 * unsigned int plat_calc_core_pos(uint64_t mpidr)
79 * helper function to calculate the core position.
80 * With this function.
81 */
82func plat_calc_core_pos
83 and x1, x0, #MPIDR_CPU_MASK
84 and x0, x0, #MPIDR_CLUSTER_MASK
85 add x0, x1, x0, LSR #6
86 ret
87endfunc plat_calc_core_pos
88
89 /* ---------------------------------------------
90 * function to get the entrypoint.
91 * ---------------------------------------------
92 */
93func plat_get_my_entrypoint
94 adrp x1, mailbox_base
95 ldr x0, [x1, :lo12:mailbox_base]
96 ret
97endfunc plat_get_my_entrypoint
98
99func imx_mailbox_init
100 adrp x1, mailbox_base
101 str x0, [x1, :lo12:mailbox_base]
102 ret
103endfunc imx_mailbox_init
104
105func plat_secondary_cold_boot_setup
106 b .
107endfunc plat_secondary_cold_boot_setup
108
109func plat_crash_console_init
Antonio Nino Diaz1eb64a12018-10-17 15:29:34 +0100110 mov x0, #1
Anson Huang4c28fc32018-06-05 16:12:27 +0800111 ret
112endfunc plat_crash_console_init
113
114func plat_crash_console_putc
115 ret
116endfunc plat_crash_console_putc
117
Antonio Nino Diaz1eb64a12018-10-17 15:29:34 +0100118func plat_crash_console_flush
119 mov x0, #0
120 ret
121endfunc plat_crash_console_flush
122
Anson Huang4c28fc32018-06-05 16:12:27 +0800123func platform_mem_init
124 ret
125endfunc platform_mem_init