| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | /* |
| Varun Wadekar | c92050b | 2017-03-29 14:57:29 -0700 | [diff] [blame] | 2 | * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef MEMCTRL_H |
| 8 | #define MEMCTRL_H |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 9 | |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 10 | void tegra_memctrl_setup(void); |
| Varun Wadekar | 6eec6d6 | 2016-03-03 13:28:10 -0800 | [diff] [blame] | 11 | void tegra_memctrl_restore_settings(void); |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 12 | void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes); |
| Varun Wadekar | 0dc9181 | 2015-12-30 15:06:41 -0800 | [diff] [blame] | 13 | void tegra_memctrl_tzram_setup(uint64_t phys_base, uint32_t size_in_bytes); |
| Varun Wadekar | 7a269e2 | 2015-06-10 14:04:32 +0530 | [diff] [blame] | 14 | void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes); |
| Varun Wadekar | c92050b | 2017-03-29 14:57:29 -0700 | [diff] [blame] | 15 | void tegra_memctrl_disable_ahb_redirection(void); |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 16 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 17 | #endif /* MEMCTRL_H */ |