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Jens Wiklander52c798e2015-12-07 14:37:10 +01001/*
2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jens Wiklander52c798e2015-12-07 14:37:10 +01005 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <assert_macros.S>
10#include <platform_def.h>
11
12 .globl plat_my_core_pos
13 .globl plat_get_my_entrypoint
14 .globl platform_mem_init
15 .globl plat_qemu_calc_core_pos
16 .globl plat_crash_console_init
Michalis Pappascca6cb72018-03-04 15:43:38 +080017#if MULTI_CONSOLE_API
Jens Wiklander52c798e2015-12-07 14:37:10 +010018 .globl plat_crash_console_putc
Michalis Pappascca6cb72018-03-04 15:43:38 +080019#endif /* MULTI_CONSOLE_API */
Jens Wiklander52c798e2015-12-07 14:37:10 +010020 .globl plat_secondary_cold_boot_setup
21 .globl plat_get_my_entrypoint
22 .globl plat_is_my_cpu_primary
23
Jens Wiklander52c798e2015-12-07 14:37:10 +010024func plat_my_core_pos
25 mrs x0, mpidr_el1
26 b plat_qemu_calc_core_pos
27endfunc plat_my_core_pos
28
29/*
30 * unsigned int plat_qemu_calc_core_pos(u_register_t mpidr);
31 * With this function: CorePos = (ClusterId * 4) + CoreId
32 */
33func plat_qemu_calc_core_pos
34 and x1, x0, #MPIDR_CPU_MASK
35 and x0, x0, #MPIDR_CLUSTER_MASK
36 add x0, x1, x0, LSR #6
37 ret
38endfunc plat_qemu_calc_core_pos
39
40 /* -----------------------------------------------------
41 * unsigned int plat_is_my_cpu_primary (void);
42 *
43 * Find out whether the current cpu is the primary
44 * cpu.
45 * -----------------------------------------------------
46 */
47func plat_is_my_cpu_primary
48 mrs x0, mpidr_el1
49 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
50 cmp x0, #QEMU_PRIMARY_CPU
51 cset w0, eq
52 ret
53endfunc plat_is_my_cpu_primary
54
55 /* -----------------------------------------------------
56 * void plat_secondary_cold_boot_setup (void);
57 *
58 * This function performs any platform specific actions
59 * needed for a secondary cpu after a cold reset e.g
60 * mark the cpu's presence, mechanism to place it in a
61 * holding pen etc.
62 * -----------------------------------------------------
63 */
64func plat_secondary_cold_boot_setup
65 /* Calculate address of our hold entry */
66 bl plat_my_core_pos
Etienne Carriere5eb85e42017-10-24 01:09:52 +020067 lsl x0, x0, #PLAT_QEMU_HOLD_ENTRY_SHIFT
Jens Wiklander52c798e2015-12-07 14:37:10 +010068 mov_imm x2, PLAT_QEMU_HOLD_BASE
69
70 /* Wait until we have a go */
71poll_mailbox:
72 ldr x1, [x2, x0]
73 cbz x1, 1f
74 mov_imm x0, PLAT_QEMU_TRUSTED_MAILBOX_BASE
75 ldr x1, [x0]
76 br x1
771:
78 wfe
79 b poll_mailbox
80endfunc plat_secondary_cold_boot_setup
81
82func plat_get_my_entrypoint
83 /* TODO support warm boot */
84 mov x0, #0
85 ret
86endfunc plat_get_my_entrypoint
87
88func platform_mem_init
89 ret
90endfunc platform_mem_init
91
92 /* ---------------------------------------------
93 * int plat_crash_console_init(void)
94 * Function to initialize the crash console
95 * without a C Runtime to print crash report.
96 * Clobber list : x0, x1, x2
97 * ---------------------------------------------
98 */
99func plat_crash_console_init
Michalis Pappascca6cb72018-03-04 15:43:38 +0800100 b qemu_crash_console_init
Jens Wiklander52c798e2015-12-07 14:37:10 +0100101endfunc plat_crash_console_init
102
103 /* ---------------------------------------------
104 * int plat_crash_console_putc(int c)
105 * Function to print a character on the crash
106 * console without a C Runtime.
107 * Clobber list : x1, x2
108 * ---------------------------------------------
109 */
Michalis Pappascca6cb72018-03-04 15:43:38 +0800110#if !MULTI_CONSOLE_API
Jens Wiklander52c798e2015-12-07 14:37:10 +0100111func plat_crash_console_putc
112 mov_imm x1, PLAT_QEMU_CRASH_UART_BASE
113 b console_core_putc
114endfunc plat_crash_console_putc
Michalis Pappascca6cb72018-03-04 15:43:38 +0800115#endif /* MULTI_CONSOLE_API */
Jens Wiklander52c798e2015-12-07 14:37:10 +0100116