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Paul Beesleyf3653a62019-05-22 11:22:44 +01001Xilinx Versal
2=============
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303
4Trusted Firmware-A implements the EL3 firmware layer for Xilinx Versal.
5The platform only uses the runtime part of TF-A as Xilinx Versal already has a
6BootROM (BL1) and PMC FW (BL2).
7
8BL31 is TF-A.
9BL32 is an optional Secure Payload.
10BL33 is the non-secure world software (U-Boot, Linux etc).
11
12To build:
13```bash
14make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31
15```
16
Siva Durga Prasad Paladugucbc90052019-07-10 16:15:19 +053017To build ATF for different platform (supported are "silicon"(default) and "versal_virt")
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053018```bash
19make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31
20```
21
Prasad Kummaric3c86dd2023-10-29 13:41:37 +053022To build bl32 TSP you have to rebuild bl31 too
23```bash
24make CROSS_COMPILE=aarch64-none-elf- PLAT=versal SPD=tspd RESET_TO_BL31=1 bl31 bl32
25```
26
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070027To build TF-A for JTAG DCC console
28```bash
29make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 VERSAL_CONSOLE=dcc
30```
31
Prasad Kummari0acb82f2023-12-19 15:15:25 +053032To build TF-A with Errata management interface
33```bash
34make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 ERRATA_ABI_SUPPORT=1
35```
36
Venkatesh Yadav Abbarapu82252a42021-07-20 22:27:32 -060037To build TF-A with Straight-Line Speculation(SLS)
38```bash
39make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 HARDEN_SLS_ALL=1
40```
41
Paul Beesleyf3653a62019-05-22 11:22:44 +010042Xilinx Versal platform specific build options
43---------------------------------------------
44
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053045* `VERSAL_ATF_MEM_BASE`: Specifies the base address of the bl31 binary.
46* `VERSAL_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
47* `VERSAL_BL32_MEM_BASE`: Specifies the base address of the bl32 binary.
48* `VERSAL_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary.
49
50* `VERSAL_CONSOLE`: Select the console driver. Options:
51 - `pl011`, `pl011_0`: ARM pl011 UART 0
52 - `pl011_1` : ARM pl011 UART 1
53
54* `VERSAL_PLATFORM`: Select the platform. Options:
55 - `versal_virt` : Versal Virtual platform
Venkatesh Yadav Abbarapu9c3b77b2022-04-13 09:04:53 +053056 - `spp_itr6` : SPP ITR6
Venkatesh Yadav Abbarapu1d6d9dd2022-05-11 13:46:28 +053057 - `emu_itr6` : EMU ITR6
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070058
Jay Buddhabhatti1dfe4972023-04-25 04:34:51 -070059* `CPU_PWRDWN_SGI`: Select the SGI for triggering CPU power down request to
60 secondary cores on receiving power down callback from
61 firmware. Options:
62
63 - `0` : SGI 0
64 - `1` : SGI 1
65 - `2` : SGI 2
66 - `3` : SGI 3
67 - `4` : SGI 4
68 - `5` : SGI 5
69 - `6` : SGI 6 (Default)
70 - `7` : SGI 7
71
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070072# PLM->TF-A Parameter Passing
73------------------------------
74The PLM populates a data structure with image information for the TF-A. The TF-A
75uses that data to hand off to the loaded images. The address of the handoff
76data structure is passed in the ```PMC_GLOBAL_GLOB_GEN_STORAGE4``` register.
77The register is free to be used by other software once the TF-A is bringing up
78further firmware images.