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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Manish V Badarkhe1da211a2020-05-31 10:17:59 +01002 * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Sandrine Bailleux04b66d82015-03-18 14:52:53 +00007#include <assert.h>
Sandrine Bailleux04b66d82015-03-18 14:52:53 +00008#include <stdint.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
10#include <arch_helpers.h>
11#include <common/debug.h>
Antonio Nino Diaz1b0c6f12019-01-23 21:08:43 +000012#include <drivers/arm/css/css_mhu.h>
Antonio Nino Diaz326f56b2019-01-23 18:55:03 +000013#include <drivers/arm/css/css_scp.h>
Antonio Nino Diazae9654d2019-01-25 14:23:49 +000014#include <drivers/arm/css/css_scpi.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <plat/common/platform.h>
Antonio Nino Diaza320ecd2019-01-15 14:19:50 +000016#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000018/* ID of the MHU slot used for the BOM protocol */
19#define BOM_MHU_SLOT_ID 0
Dan Handley9df48042015-03-19 18:58:55 +000020
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000021/* Boot commands sent from AP -> SCP */
22#define BOOT_CMD_INFO 0x00
23#define BOOT_CMD_DATA 0x01
Dan Handley9df48042015-03-19 18:58:55 +000024
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000025/* BOM command header */
Dan Handley9df48042015-03-19 18:58:55 +000026typedef struct {
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000027 uint32_t id : 8;
28 uint32_t reserved : 24;
29} bom_cmd_t;
Dan Handley9df48042015-03-19 18:58:55 +000030
31typedef struct {
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000032 uint32_t image_size;
33 uint32_t checksum;
34} cmd_info_payload_t;
Dan Handley9df48042015-03-19 18:58:55 +000035
36/*
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000037 * Unlike the SCPI protocol, the boot protocol uses the same memory region
Dan Handley9df48042015-03-19 18:58:55 +000038 * for both AP -> SCP and SCP -> AP transfers; define the address of this...
39 */
Vikram Kanigiri72084192016-02-08 16:29:30 +000040#define BOM_SHARED_MEM PLAT_CSS_SCP_COM_SHARED_MEM_BASE
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000041#define BOM_CMD_HEADER ((bom_cmd_t *) BOM_SHARED_MEM)
42#define BOM_CMD_PAYLOAD ((void *) (BOM_SHARED_MEM + sizeof(bom_cmd_t)))
Dan Handley9df48042015-03-19 18:58:55 +000043
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000044typedef struct {
45 /* Offset from the base address of the Trusted RAM */
46 uint32_t offset;
47 uint32_t block_size;
48} cmd_data_payload_t;
Dan Handley9df48042015-03-19 18:58:55 +000049
Soby Mathew2f6cac42017-06-13 18:00:53 +010050/*
Soby Mathewaf14b462018-06-01 16:53:38 +010051 * All CSS platforms load SCP_BL2/SCP_BL2U just below BL2 (this is where BL31
52 * usually resides except when ARM_BL31_IN_DRAM is
53 * set). Ensure that SCP_BL2/SCP_BL2U do not overflow into shared RAM and
Manish V Badarkhe1da211a2020-05-31 10:17:59 +010054 * the fw_config.
Soby Mathew2f6cac42017-06-13 18:00:53 +010055 */
Soby Mathewaf14b462018-06-01 16:53:38 +010056CASSERT(SCP_BL2_LIMIT <= BL2_BASE, assert_scp_bl2_overwrite_bl2);
57CASSERT(SCP_BL2U_LIMIT <= BL2_BASE, assert_scp_bl2u_overwrite_bl2);
Soby Mathew2f6cac42017-06-13 18:00:53 +010058
Manish V Badarkhe1da211a2020-05-31 10:17:59 +010059CASSERT(SCP_BL2_BASE >= ARM_FW_CONFIG_LIMIT, assert_scp_bl2_overflow);
60CASSERT(SCP_BL2U_BASE >= ARM_FW_CONFIG_LIMIT, assert_scp_bl2u_overflow);
Soby Mathew2f6cac42017-06-13 18:00:53 +010061
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000062static void scp_boot_message_start(void)
63{
64 mhu_secure_message_start(BOM_MHU_SLOT_ID);
Dan Handley9df48042015-03-19 18:58:55 +000065}
66
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000067static void scp_boot_message_send(size_t payload_size)
Dan Handley9df48042015-03-19 18:58:55 +000068{
Juan Castillo2e86cb12016-01-13 15:01:09 +000069 /* Ensure that any write to the BOM payload area is seen by SCP before
70 * we write to the MHU register. If these 2 writes were reordered by
71 * the CPU then SCP would read stale payload data */
72 dmbst();
Dan Handley9df48042015-03-19 18:58:55 +000073
74 /* Send command to SCP */
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000075 mhu_secure_message_send(BOM_MHU_SLOT_ID);
Dan Handley9df48042015-03-19 18:58:55 +000076}
77
78static uint32_t scp_boot_message_wait(size_t size)
79{
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000080 uint32_t mhu_status;
81
82 mhu_status = mhu_secure_message_wait();
83
84 /* Expect an SCP Boot Protocol message, reject any other protocol */
85 if (mhu_status != (1 << BOM_MHU_SLOT_ID)) {
86 ERROR("MHU: Unexpected protocol (MHU status: 0x%x)\n",
87 mhu_status);
88 panic();
89 }
Dan Handley9df48042015-03-19 18:58:55 +000090
Juan Castillo2e86cb12016-01-13 15:01:09 +000091 /* Ensure that any read to the BOM payload area is done after reading
92 * the MHU register. If these 2 reads were reordered then the CPU would
93 * read invalid payload data */
94 dmbld();
Dan Handley9df48042015-03-19 18:58:55 +000095
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000096 return *(uint32_t *) BOM_SHARED_MEM;
Dan Handley9df48042015-03-19 18:58:55 +000097}
98
99static void scp_boot_message_end(void)
100{
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000101 mhu_secure_message_end(BOM_MHU_SLOT_ID);
Dan Handley9df48042015-03-19 18:58:55 +0000102}
103
Soby Mathew73b7bf92017-05-03 12:58:41 +0100104int css_scp_boot_image_xfer(void *image, unsigned int image_size)
Dan Handley9df48042015-03-19 18:58:55 +0000105{
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000106 uint32_t response;
107 uint32_t checksum;
108 cmd_info_payload_t *cmd_info_payload;
109 cmd_data_payload_t *cmd_data_payload;
Dan Handley9df48042015-03-19 18:58:55 +0000110
Juan Castilloa72b6472015-12-10 15:49:17 +0000111 assert((uintptr_t) image == SCP_BL2_BASE);
Dan Handley9df48042015-03-19 18:58:55 +0000112
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000113 if ((image_size == 0) || (image_size % 4 != 0)) {
Juan Castilloa72b6472015-12-10 15:49:17 +0000114 ERROR("Invalid size for the SCP_BL2 image. Must be a multiple of "
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000115 "4 bytes and not zero (current size = 0x%x)\n",
116 image_size);
117 return -1;
118 }
Dan Handley9df48042015-03-19 18:58:55 +0000119
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000120 /* Extract the checksum from the image */
121 checksum = *(uint32_t *) image;
122 image = (char *) image + sizeof(checksum);
123 image_size -= sizeof(checksum);
Dan Handley9df48042015-03-19 18:58:55 +0000124
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000125 mhu_secure_init();
Dan Handley9df48042015-03-19 18:58:55 +0000126
Juan Castilloa72b6472015-12-10 15:49:17 +0000127 VERBOSE("Send info about the SCP_BL2 image to be transferred to SCP\n");
Dan Handley9df48042015-03-19 18:58:55 +0000128
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000129 /*
130 * Send information about the SCP firmware image about to be transferred
131 * to SCP
132 */
133 scp_boot_message_start();
134
135 BOM_CMD_HEADER->id = BOOT_CMD_INFO;
136 cmd_info_payload = BOM_CMD_PAYLOAD;
137 cmd_info_payload->image_size = image_size;
138 cmd_info_payload->checksum = checksum;
139
140 scp_boot_message_send(sizeof(*cmd_info_payload));
Sandrine Bailleux7da652d2015-04-13 11:47:48 +0100141#if CSS_DETECT_PRE_1_7_0_SCP
142 {
143 const uint32_t deprecated_scp_nack_cmd = 0x404;
144 uint32_t mhu_status;
145
146 VERBOSE("Detecting SCP version incompatibility\n");
147
148 mhu_status = mhu_secure_message_wait();
149 if (mhu_status == deprecated_scp_nack_cmd) {
150 ERROR("Detected an incompatible version of the SCP firmware.\n");
151 ERROR("Only versions from v1.7.0 onwards are supported.\n");
152 ERROR("Please update the SCP firmware.\n");
153 return -1;
154 }
155
156 VERBOSE("SCP version looks OK\n");
157 }
158#endif /* CSS_DETECT_PRE_1_7_0_SCP */
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000159 response = scp_boot_message_wait(sizeof(response));
160 scp_boot_message_end();
Dan Handley9df48042015-03-19 18:58:55 +0000161
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000162 if (response != 0) {
163 ERROR("SCP BOOT_CMD_INFO returned error %u\n", response);
164 return -1;
165 }
166
Juan Castilloa72b6472015-12-10 15:49:17 +0000167 VERBOSE("Transferring SCP_BL2 image to SCP\n");
Dan Handley9df48042015-03-19 18:58:55 +0000168
Juan Castilloa72b6472015-12-10 15:49:17 +0000169 /* Transfer SCP_BL2 image to SCP */
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000170 scp_boot_message_start();
Dan Handley9df48042015-03-19 18:58:55 +0000171
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000172 BOM_CMD_HEADER->id = BOOT_CMD_DATA;
173 cmd_data_payload = BOM_CMD_PAYLOAD;
Sandrine Bailleux47ea1bc2015-06-09 11:53:33 +0100174 cmd_data_payload->offset = (uintptr_t) image - ARM_TRUSTED_SRAM_BASE;
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000175 cmd_data_payload->block_size = image_size;
Dan Handley9df48042015-03-19 18:58:55 +0000176
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000177 scp_boot_message_send(sizeof(*cmd_data_payload));
178 response = scp_boot_message_wait(sizeof(response));
179 scp_boot_message_end();
Dan Handley9df48042015-03-19 18:58:55 +0000180
Sandrine Bailleux04b66d82015-03-18 14:52:53 +0000181 if (response != 0) {
182 ERROR("SCP BOOT_CMD_DATA returned error %u\n", response);
183 return -1;
Dan Handley9df48042015-03-19 18:58:55 +0000184 }
185
Soby Mathew73b7bf92017-05-03 12:58:41 +0100186 return 0;
Dan Handley9df48042015-03-19 18:58:55 +0000187}
Soby Mathew1ced6b82017-06-12 12:37:10 +0100188
189int css_scp_boot_ready(void)
190{
191 VERBOSE("Waiting for SCP to signal it is ready to go on\n");
192
193 /* Wait for SCP to signal it's ready */
194 return scpi_wait_ready();
195}