blob: 826d01b7e959106621ec446c18c64dee4f3701fd [file] [log] [blame]
Dan Handley1c54d972014-06-20 12:02:01 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __PLAT_CONFIG_H__
31#define __PLAT_CONFIG_H__
32
33#define CONFIG_GICC_BASE_OFFSET 0x4
34
35
36#ifndef __ASSEMBLY__
37
38#include <cassert.h>
39
40
41enum plat_config_flags {
42 /* Whether CPUECTLR SMP bit should be enabled */
43 CONFIG_CPUECTLR_SMP_BIT = 0x1,
44 /* Whether Base FVP memory map is in use */
45 CONFIG_BASE_MMAP = 0x2,
46 /* Whether CCI should be enabled */
47 CONFIG_HAS_CCI = 0x4,
48 /* Whether TZC should be configured */
49 CONFIG_HAS_TZC = 0x8
50};
51
52typedef struct plat_config {
53 unsigned int gicd_base;
54 unsigned int gicc_base;
55 unsigned int gich_base;
56 unsigned int gicv_base;
57 unsigned int max_aff0;
58 unsigned int max_aff1;
59 unsigned long flags;
60} plat_config_t;
61
62inline const plat_config_t *get_plat_config();
63
64
65CASSERT(CONFIG_GICC_BASE_OFFSET == __builtin_offsetof(
66 plat_config_t, gicc_base),
67 assert_gicc_base_offset_mismatch);
68
69/* If used, plat_config must be defined and populated in the platform port*/
70extern plat_config_t plat_config;
71
72inline const plat_config_t *get_plat_config()
73{
74 return &plat_config;
75}
76
77
78#endif /* __ASSEMBLY__ */
79
80#endif /* __PLAT_CONFIG_H__ */