blob: 57d6792e12cbedff74c3fd6ee037ce471b8f5569 [file] [log] [blame]
Olivier Deprezbcaa0682020-04-01 21:28:26 +02001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6/dts-v1/;
7
8#define AFF 00
9
10#include "fvp-defs.dtsi"
11#undef POST
12#define POST \
13 };
14
15/ {
16 compatible = "arm,ffa-core-manifest-1.0";
17 #address-cells = <2>;
18 #size-cells = <1>;
19
20 attribute {
21 spmc_id = <0x8000>;
22 maj_ver = <0x1>;
23 min_ver = <0x0>;
24 exec_state = <0x0>;
25 load_address = <0x0 0x6000000>;
26 entrypoint = <0x0 0x6000000>;
27 binary_size = <0x80000>;
28 };
29
Olivier Deprezbcaa0682020-04-01 21:28:26 +020030 hypervisor {
31 compatible = "hafnium,hafnium";
32 vm1 {
33 is_ffa_partition;
34 debug_name = "op-tee";
35 load_address = <0x6280000>;
36 smc_whitelist = <0xbe000000>;
Olivier Deprez562b8e72020-11-25 10:29:41 +010037 vcpu_count = <8>;
38 mem_size = <1048576>;
Olivier Deprezbcaa0682020-04-01 21:28:26 +020039 };
40 };
41
42 cpus {
43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
45
46 CPU_0
47
48 /*
Olivier Deprez8f6f2682020-10-08 08:38:58 +020049 * SPMC (Hafnium) requires secondary core nodes are declared
Olivier Deprezbcaa0682020-04-01 21:28:26 +020050 * in descending order.
51 */
52 CPU_7
53 CPU_6
54 CPU_5
55 CPU_4
56 CPU_3
57 CPU_2
58 CPU_1
59 };
60
Olivier Deprez8f6f2682020-10-08 08:38:58 +020061 memory@6000000 {
Olivier Deprezbcaa0682020-04-01 21:28:26 +020062 device_type = "memory";
63 reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
64 };
65};