blob: d311807e300e30f5ba425e2345bf11bf4753c13d [file] [log] [blame]
Sughosh Ganu18f513d2018-05-16 17:22:35 +05301/*
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +05302 * Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved.
Sughosh Ganu18f513d2018-05-16 17:22:35 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef SGI_RAS_H
8#define SGI_RAS_H
Sughosh Ganu18f513d2018-05-16 17:22:35 +05309
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +053010#include <lib/extensions/ras.h>
11#include <plat/common/platform.h>
12
13/*
14 * Interrupt type supported.
15 * - SGI_RAS_INTR_TYPE_SPI: Denotes a SPI interrupt
16 * - SGI_RAS_INTR_TYPE_PPI: Denotes a PPI interrupt
17 */
18#define SGI_RAS_INTR_TYPE_SPI 0
19#define SGI_RAS_INTR_TYPE_PPI 1
20
Sughosh Ganu18f513d2018-05-16 17:22:35 +053021/*
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +053022 * MM Communicate information structure. Required to generate MM Communicate
23 * payload to be shared with Standalone MM.
Sughosh Ganu18f513d2018-05-16 17:22:35 +053024 */
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +053025typedef struct mm_communicate_header {
26 struct efi_guid header_guid;
27 size_t message_len;
28 uint8_t data[1];
29} mm_communicate_header_t;
30
31/* RAS error info data structure. */
Sughosh Ganu18f513d2018-05-16 17:22:35 +053032struct sgi_ras_ev_map {
Sughosh Ganu18f513d2018-05-16 17:22:35 +053033 int sdei_ev_num; /* SDEI Event number */
34 int intr; /* Physical intr number */
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +053035 int intr_type; /* Interrupt Type (SPI or PPI)*/
36};
37
38/* RAS config data structure. Must be defined by each platform. */
39struct plat_sgi_ras_config {
40 struct sgi_ras_ev_map *ev_map;
41 int ev_map_size;
Sughosh Ganu18f513d2018-05-16 17:22:35 +053042};
43
Omkar Anand Kulkarniaa8abf02023-05-31 11:29:17 +053044/*
45 * Find event map for a given interrupt number. On success, returns pointer
46 * to the event map. On error, returns NULL.
47 */
48struct sgi_ras_ev_map *sgi_find_ras_event_map_by_intr(uint32_t intr_num);
49
50/*
51 * Initialization function for the framework.
52 *
53 * Registers RAS config provided by the platform and then configures and
54 * enables interrupt for each registered error. On success, return 0.
55 */
56int sgi_ras_platform_setup(struct plat_sgi_ras_config *config);
Sughosh Ganu18f513d2018-05-16 17:22:35 +053057
Omkar Anand Kulkarni43525c42023-05-31 12:14:10 +053058/* Base element RAM RAS interrupt handler function. */
59int sgi_ras_sram_intr_handler(const struct err_record_info *err_rec,
60 int probe_data,
61 const struct err_handler_data *const data);
62
Omkar Anand Kulkarni1ab5c602023-06-27 16:32:47 +053063/* CPU RAS interrupt handler */
64int sgi_ras_cpu_intr_handler(const struct err_record_info *err_rec,
65 int probe_data,
66 const struct err_handler_data *const data);
67
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000068#endif /* SGI_RAS_H */