Soby Mathew | f6f2b7e | 2017-06-12 12:13:04 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __SDS_H__ |
| 8 | #define __SDS_H__ |
| 9 | |
| 10 | /* SDS Structure Identifier defines */ |
| 11 | /* AP CPU INFO defines */ |
| 12 | #define SDS_AP_CPU_INFO_STRUCT_ID 1 |
| 13 | #define SDS_AP_CPU_INFO_PRIMARY_CPUID_OFFSET 0x0 |
| 14 | #define SDS_AP_CPU_INFO_PRIMARY_CPUID_SIZE 0x4 |
| 15 | |
| 16 | /* ROM Firmware Version defines */ |
| 17 | #define SDS_ROM_VERSION_STRUCT_ID 2 |
| 18 | #define SDS_ROM_VERSION_OFFSET 0x0 |
| 19 | #define SDS_ROM_VERSION_SIZE 0x4 |
| 20 | |
| 21 | /* RAM Firmware version defines */ |
| 22 | #define SDS_RAM_VERSION_STRUCT_ID 3 |
| 23 | #define SDS_RAM_VERSION_OFFSET 0x0 |
| 24 | #define SDS_RAM_VERSION_SIZE 0x4 |
| 25 | |
| 26 | /* Platform Identity defines */ |
| 27 | #define SDS_PLATFORM_IDENTITY_STRUCT_ID 4 |
| 28 | #define SDS_PLATFORM_IDENTITY_ID_OFFSET 0x0 |
| 29 | #define SDS_PLATFORM_IDENTITY_ID_SIZE 0x4 |
| 30 | #define SDS_PLATFORM_IDENTITY_ID_CONFIG_SHIFT 28 |
| 31 | #define SDS_PLATFORM_IDENTITY_ID_CONFIG_WIDTH 4 |
| 32 | #define SDS_PLATFORM_IDENTITY_ID_CONFIG_MASK \ |
| 33 | ((1 << SDS_PLATFORM_IDENTITY_ID_CONFIG_WIDTH) - 1) |
| 34 | |
| 35 | #define SDS_PLATFORM_IDENTITY_PLAT_TYPE_OFFSET 0x4 |
| 36 | #define SDS_PLATFORM_IDENTITY_PLAT_TYPE_SIZE 0x4 |
| 37 | |
| 38 | /* Reset Syndrome defines */ |
| 39 | #define SDS_RESET_SYNDROME_STRUCT_ID 5 |
| 40 | #define SDS_RESET_SYNDROME_OFFSET 0 |
| 41 | #define SDS_RESET_SYNDROME_SIZE 4 |
| 42 | #define SDS_RESET_SYNDROME_POW_ON_RESET_BIT (1 << 0) |
| 43 | #define SDS_RESET_SYNDROME_SCP_WD_RESET_BIT (1 << 1) |
| 44 | #define SDS_RESET_SYNDROME_AP_WD_RESET_BIT (1 << 2) |
| 45 | #define SDS_RESET_SYNDROME_SYS_RESET_REQ_BIT (1 << 3) |
| 46 | #define SDS_RESET_SYNDROME_M3_LOCKUP_BIT (1 << 4) |
| 47 | |
| 48 | /* SCP Firmware Feature Availability defines */ |
| 49 | #define SDS_FEATURE_AVAIL_STRUCT_ID 6 |
| 50 | #define SDS_FEATURE_AVAIL_OFFSET 0 |
| 51 | #define SDS_FEATURE_AVAIL_SIZE 4 |
| 52 | #define SDS_FEATURE_AVAIL_SCP_RAM_READY_BIT (1 << 0) |
| 53 | #define SDS_FEATURE_AVAIL_DMC_READY_BIT (1 << 1) |
| 54 | #define SDS_FEATURE_AVAIL_MSG_IF_READY_BIT (1 << 2) |
| 55 | |
| 56 | /* SCP BL2 Image Metadata defines */ |
| 57 | #define SDS_SCP_IMG_STRUCT_ID 9 |
| 58 | #define SDS_SCP_IMG_FLAG_OFFSET 0 |
| 59 | #define SDS_SCP_IMG_FLAG_SIZE 4 |
| 60 | #define SDS_SCP_IMG_VALID_FLAG_BIT (1 << 0) |
| 61 | #define SDS_SCP_IMG_ADDR_OFFSET 4 |
| 62 | #define SDS_SCP_IMG_ADDR_SIZE 4 |
| 63 | #define SDS_SCP_IMG_SIZE_OFFSET 8 |
| 64 | #define SDS_SCP_IMG_SIZE_SIZE 4 |
| 65 | |
| 66 | /* SDS Driver Error Codes */ |
| 67 | #define SDS_OK 0 |
| 68 | #define SDS_ERR_FAIL -1 |
| 69 | #define SDS_ERR_INVALID_PARAMS -2 |
| 70 | #define SDS_ERR_STRUCT_NOT_FOUND -3 |
| 71 | #define SDS_ERR_STRUCT_NOT_FINALIZED -4 |
| 72 | |
| 73 | #ifndef __ASSEMBLY__ |
| 74 | #include <stddef.h> |
| 75 | #include <stdint.h> |
| 76 | |
| 77 | typedef enum { |
| 78 | SDS_ACCESS_MODE_NON_CACHED, |
| 79 | SDS_ACCESS_MODE_CACHED, |
| 80 | } sds_access_mode_t; |
| 81 | |
| 82 | int sds_init(void); |
Roberto Vargas | 4fa337c | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 83 | int sds_struct_exists(unsigned int structure_id); |
Soby Mathew | f6f2b7e | 2017-06-12 12:13:04 +0100 | [diff] [blame] | 84 | int sds_struct_read(uint32_t structure_id, unsigned int fld_off, void *data, |
| 85 | size_t size, sds_access_mode_t mode); |
| 86 | int sds_struct_write(uint32_t structure_id, unsigned int fld_off, void *data, |
| 87 | size_t size, sds_access_mode_t mode); |
| 88 | #endif /*__ASSEMBLY__ */ |
| 89 | #endif /* __SDS_H__ */ |