blob: 5a2120bc91e007eca25e987f76e53c8f37d7b27e [file] [log] [blame]
Gary Morrison3d7f6542021-01-27 13:08:47 -06001/*
Govindraj Rajaeee28e72023-08-01 15:52:40 -05002 * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
Gary Morrison3d7f6542021-01-27 13:08:47 -06003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <stdbool.h>
9#include <stdint.h>
10
11#include "../xlat_mpu_private.h"
12#include <arch.h>
13#include <arch_features.h>
14#include <lib/cassert.h>
15#include <lib/utils_def.h>
16#include <lib/xlat_tables/xlat_tables_v2.h>
17
18#include <fvp_r_arch_helpers.h>
19
20#warning "xlat_mpu library is currently experimental and its API may change in future."
21
22#if ENABLE_ASSERTIONS
23/*
24 * Return minimum virtual address space size supported by the architecture
25 */
26uintptr_t xlat_get_min_virt_addr_space_size(void)
27{
28 uintptr_t ret;
29
30 if (is_armv8_4_ttst_present()) {
31 ret = MIN_VIRT_ADDR_SPACE_SIZE_TTST;
32 } else {
33 ret = MIN_VIRT_ADDR_SPACE_SIZE;
34 }
35 return ret;
36}
37#endif /* ENABLE_ASSERTIONS*/
38
39bool is_mpu_enabled_ctx(const xlat_ctx_t *ctx)
40{
41 if (ctx->xlat_regime == EL1_EL0_REGIME) {
42 assert(xlat_arch_current_el() >= 1U);
43 return (read_sctlr_el1() & SCTLR_M_BIT) != 0U;
44 } else {
45 assert(xlat_arch_current_el() >= 2U);
46 return (read_sctlr_el2() & SCTLR_M_BIT) != 0U;
47 }
48}
49
50bool is_dcache_enabled(void)
51{
52 unsigned int el = get_current_el();
53
54 if (el == 1U) {
55 return (read_sctlr_el1() & SCTLR_C_BIT) != 0U;
56 } else { /* must be EL2 */
57 return (read_sctlr_el2() & SCTLR_C_BIT) != 0U;
58 }
59}
60
61unsigned int xlat_arch_current_el(void)
62{
63 unsigned int el = (unsigned int)GET_EL(read_CurrentEl());
64
65 assert(el > 0U);
66
67 return el;
68}
69