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Nariman Poushin0ece80f2018-02-26 06:52:04 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Chandni Cherukuric8ef0452018-10-04 16:32:03 +05307#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Chandni Cherukuric8ef0452018-10-04 16:32:03 +05309#include <libfdt.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/bl_common.h>
12#include <common/debug.h>
13
Nariman Poushin0ece80f2018-02-26 06:52:04 +000014#include <plat_arm.h>
Sughosh Ganu18f513d2018-05-16 17:22:35 +053015#include <sgi_ras.h>
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053016#include <sgi_variant.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017
Chandni Cherukuri61f3a7c2018-10-11 14:08:08 +053018#include "../../css/drivers/scmi/scmi.h"
19#include "../../css/drivers/mhu/css_mhu_doorbell.h"
20
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053021sgi_platform_info_t sgi_plat_info;
22
Chandni Cherukuri61f3a7c2018-10-11 14:08:08 +053023static scmi_channel_plat_info_t sgi575_scmi_plat_info = {
24 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
25 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
26 .db_preserve_mask = 0xfffffffe,
27 .db_modify_mask = 0x1,
28 .ring_doorbell = &mhu_ring_doorbell,
29};
30
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053031static scmi_channel_plat_info_t sgi_clark_scmi_plat_info = {
32 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
33 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
34 .db_preserve_mask = 0xfffffffe,
35 .db_modify_mask = 0x1,
36 .ring_doorbell = &mhuv2_ring_doorbell,
37};
38
Chandni Cherukuri61f3a7c2018-10-11 14:08:08 +053039scmi_channel_plat_info_t *plat_css_get_scmi_info()
40{
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053041 if (sgi_plat_info.platform_id == SGI_CLARK_SID_VER_PART_NUM)
42 return &sgi_clark_scmi_plat_info;
43 else if (sgi_plat_info.platform_id == SGI575_SSC_VER_PART_NUM)
44 return &sgi575_scmi_plat_info;
45 else
46 panic();
47};
48
Nariman Poushin0ece80f2018-02-26 06:52:04 +000049void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
50 u_register_t arg2, u_register_t arg3)
51{
Chandni Cherukuri3aa09f72018-11-28 11:31:51 +053052 sgi_plat_info.platform_id = plat_arm_sgi_get_platform_id();
53 sgi_plat_info.config_id = plat_arm_sgi_get_config_id();
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053054
Nariman Poushin0ece80f2018-02-26 06:52:04 +000055 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
56}
Sughosh Ganu18f513d2018-05-16 17:22:35 +053057
58void bl31_platform_setup(void)
59{
60 arm_bl31_platform_setup();
61
62#if RAS_EXTENSION
63 sgi_ras_intr_handler_setup();
64#endif
65}
Chandni Cherukurie4bf6a02018-11-14 13:43:59 +053066
67const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
68{
Chandni Cherukuri2dfe1d02018-11-22 10:15:25 +053069 /* For SGI-Clark.Helios platform only CPU ON/OFF is supported */
70 if ((sgi_plat_info.platform_id == SGI_CLARK_SID_VER_PART_NUM) &&
71 (sgi_plat_info.config_id == SGI_CLARK_HELIOS_CONFIG_ID)) {
72 ops->cpu_standby = NULL;
73 ops->system_off = NULL;
74 ops->system_reset = NULL;
75 ops->get_sys_suspend_power_state = NULL;
76 ops->pwr_domain_suspend = NULL;
77 ops->pwr_domain_suspend_finish = NULL;
78 }
79
Chandni Cherukurie4bf6a02018-11-14 13:43:59 +053080 return css_scmi_override_pm_ops(ops);
81}