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git01.mediatek.com / filogic / atf / 16d31089daa0b99a6bb37b60b9df66c10c6301ab / . / plat / arm / board / rdn1edge / platform.mk
blob: 95753aafcd9d2e70959ff14754dd59d29077cbc5 [file] [log] [blame]
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]1#
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]2# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Manish V Badarkhe3f5be1c2022-10-19 09:31:07 +0100[diff] [blame]7$(warning Platform ${PLAT} is deprecated. Some of the features might not work as expected)
8
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]9# GIC-600 configuration
10GICV3_IMPL_GIC600_MULTICHIP := 1
11
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]12include plat/arm/css/sgi/sgi-common.mk
13
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]14RDN1EDGE_BASE = plat/arm/board/rdn1edge
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]15
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]16PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]17
John Tsichritzis56369c12019-02-19 13:49:06 +0000[diff] [blame]18SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]19
Aditya Angadi502d0ac2020-11-18 08:27:15 +0530[diff] [blame]20PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
21
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]22BL1_SOURCES += ${SGI_CPU_SOURCES} \
23 ${RDN1EDGE_BASE}/rdn1edge_err.c
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]24
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]25BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
26 ${RDN1EDGE_BASE}/rdn1edge_security.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]27 ${RDN1EDGE_BASE}/rdn1edge_err.c \
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +0530[diff] [blame]28 drivers/arm/tzc/tzc_dmc620.c \
29 lib/utils/mem_region.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]30 plat/arm/common/arm_nor_psci_mem_protect.c
31
32BL31_SOURCES += ${SGI_CPU_SOURCES} \
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]33 ${RDN1EDGE_BASE}/rdn1edge_plat.c \
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]34 ${RDN1EDGE_BASE}/rdn1edge_topology.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]35 drivers/cfi/v2m/v2m_flash.c \
36 lib/utils/mem_region.c \
37 plat/arm/common/arm_nor_psci_mem_protect.c
38
Max Shvetsov06dba292019-12-06 11:50:12 +0000[diff] [blame]39ifeq (${TRUSTED_BOARD_BOOT}, 1)
40BL1_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
41BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
42endif
43
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +0530[diff] [blame]44# Enable dynamic addition of MMAP regions in BL31
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900[diff] [blame]45BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +0530[diff] [blame]46
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]47# Add the FDT_SOURCES and options for Dynamic Config
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100[diff] [blame]48FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_fw_config.dts \
49 ${RDN1EDGE_BASE}/fdts/${PLAT}_tb_fw_config.dts
50FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
51TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]52
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100[diff] [blame]53# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Delliene9b259e2020-09-10 09:49:42 +0100[diff] [blame]54$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]55# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100[diff] [blame]56$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]57
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]58FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +0530[diff] [blame]59NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]60
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +0530[diff] [blame]61# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100[diff] [blame]62$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]63
Vijayenthiran Subramaniamcfa3aea2020-02-12 13:26:33 +0530[diff] [blame]64$(eval $(call CREATE_SEQ,SEQ,2))
65ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
66 $(error "Chip count for RDN1Edge platform should be one of $(SEQ), currently \
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +0530[diff] [blame]67 set to ${CSS_SGI_CHIP_COUNT}.")
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +0530[diff] [blame]68endif
69
Aditya Angadi06402222021-03-20 12:06:15 +0530[diff] [blame]70ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
71 $(error "CSS_SGI_PLATFORM_VARIANT for RD-N1-Edge should always be 0, \
72 currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
73endif
74
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]75override CTX_INCLUDE_AARCH32_REGS := 0