Arvind Ram Prakash | eaa9019 | 2023-12-21 00:25:52 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef DSU_H |
| 8 | #define DSU_H |
| 9 | |
| 10 | #define PMCR_N_MAX 0x1f |
| 11 | |
| 12 | #define save_pmu_reg(state, reg) state->reg = read_##reg() |
| 13 | |
| 14 | #define restore_pmu_reg(context, reg) write_##reg(context->reg) |
| 15 | |
| 16 | typedef struct cluster_pmu_state{ |
| 17 | uint64_t clusterpmcr; |
| 18 | uint64_t clusterpmcntenset; |
| 19 | uint64_t clusterpmccntr; |
| 20 | uint64_t clusterpmovsset; |
| 21 | uint64_t clusterpmselr; |
| 22 | uint64_t clusterpmsevtyper; |
| 23 | uint64_t counter_val[PMCR_N_MAX]; |
| 24 | uint64_t counter_type[PMCR_N_MAX]; |
| 25 | } cluster_pmu_state_t; |
| 26 | |
| 27 | static inline unsigned int read_cluster_eventctr_num(void) |
| 28 | { |
| 29 | return ((read_clusterpmcr() >> CLUSTERPMCR_N_SHIFT) & |
| 30 | CLUSTERPMCR_N_MASK); |
| 31 | } |
| 32 | |
| 33 | |
| 34 | void save_dsu_pmu_state(cluster_pmu_state_t *cluster_pmu_context); |
| 35 | |
| 36 | void restore_dsu_pmu_state(cluster_pmu_state_t *cluster_pmu_context); |
| 37 | |
| 38 | void cluster_on_dsu_pmu_context_restore(void); |
| 39 | |
| 40 | void cluster_off_dsu_pmu_context_save(void); |
| 41 | |
| 42 | #endif /* DSU_H */ |