| developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 5 | */ |
| 6 | #include <arch.h> |
| 7 | #include <asm_macros.S> |
| 8 | #include <mt8173_def.h> |
| 9 | |
| 10 | .globl plat_secondary_cold_boot_setup |
| 11 | .globl plat_report_exception |
| 12 | .globl platform_is_primary_cpu |
| Koan-Sin Tan | bc99807 | 2017-01-19 16:43:49 +0800 | [diff] [blame] | 13 | .globl plat_my_core_pos |
| developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 14 | .globl plat_crash_console_init |
| 15 | .globl plat_crash_console_putc |
| 16 | |
| 17 | /* ----------------------------------------------------- |
| 18 | * void plat_secondary_cold_boot_setup (void); |
| 19 | * |
| 20 | * This function performs any platform specific actions |
| 21 | * needed for a secondary cpu after a cold reset e.g |
| 22 | * mark the cpu's presence, mechanism to place it in a |
| 23 | * holding pen etc. |
| 24 | * ----------------------------------------------------- |
| 25 | */ |
| 26 | func plat_secondary_cold_boot_setup |
| 27 | /* MT8173 Oak does not do cold boot for secondary CPU */ |
| 28 | cb_panic: |
| 29 | b cb_panic |
| 30 | endfunc plat_secondary_cold_boot_setup |
| 31 | |
| 32 | func platform_is_primary_cpu |
| 33 | and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
| 34 | cmp x0, #MT8173_PRIMARY_CPU |
| 35 | cset x0, eq |
| 36 | ret |
| 37 | endfunc platform_is_primary_cpu |
| 38 | |
| Koan-Sin Tan | bc99807 | 2017-01-19 16:43:49 +0800 | [diff] [blame] | 39 | /* ----------------------------------------------------- |
| 40 | * unsigned int plat_my_core_pos(void); |
| 41 | * |
| 42 | * result: CorePos = CoreId + (ClusterId << 2) |
| 43 | * ----------------------------------------------------- |
| 44 | */ |
| 45 | func plat_my_core_pos |
| 46 | mrs x0, mpidr_el1 |
| 47 | and x1, x0, #MPIDR_CPU_MASK |
| 48 | and x0, x0, #MPIDR_CLUSTER_MASK |
| 49 | add x0, x1, x0, LSR #6 |
| 50 | ret |
| 51 | endfunc plat_my_core_pos |
| Koan-Sin Tan | bc99807 | 2017-01-19 16:43:49 +0800 | [diff] [blame] | 52 | |
| developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 53 | /* --------------------------------------------- |
| 54 | * int plat_crash_console_init(void) |
| 55 | * Function to initialize the crash console |
| 56 | * without a C Runtime to print crash report. |
| Juan Castillo | e7ae6db | 2015-11-26 14:52:15 +0000 | [diff] [blame] | 57 | * Clobber list : x0 - x4 |
| developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 58 | * --------------------------------------------- |
| 59 | */ |
| 60 | func plat_crash_console_init |
| 61 | mov_imm x0, MT8173_UART0_BASE |
| 62 | mov_imm x1, MT8173_UART_CLOCK |
| 63 | mov_imm x2, MT8173_BAUDRATE |
| 64 | b console_core_init |
| 65 | endfunc plat_crash_console_init |
| 66 | |
| 67 | /* --------------------------------------------- |
| 68 | * int plat_crash_console_putc(void) |
| 69 | * Function to print a character on the crash |
| 70 | * console without a C Runtime. |
| 71 | * Clobber list : x1, x2 |
| 72 | * --------------------------------------------- |
| 73 | */ |
| 74 | func plat_crash_console_putc |
| 75 | mov_imm x1, MT8173_UART0_BASE |
| 76 | b console_core_putc |
| 77 | endfunc plat_crash_console_putc |