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Rohit Mathew14ffa8a2021-12-13 13:50:15 +00001/*
2 * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef SGI_SOC_CSS_DEF_H
8#define SGI_SOC_CSS_DEF_H
9
10#include <lib/utils_def.h>
11#include <plat/arm/board/common/v2m_def.h>
12#include <plat/arm/soc/common/soc_css_def.h>
13#include <plat/common/common_def.h>
14
15/*
16 * Definitions common to all ARM CSSv1-based development platforms
17 */
18
19/* Platform ID address */
20#define BOARD_CSS_PLAT_ID_REG_ADDR UL(0x7ffe00e0)
21
22/* Platform ID related accessors */
23#define BOARD_CSS_PLAT_ID_REG_ID_MASK 0x0f
24#define BOARD_CSS_PLAT_ID_REG_ID_SHIFT 0x0
25#define BOARD_CSS_PLAT_TYPE_EMULATOR 0x02
26
27#ifndef __ASSEMBLER__
28
29#include <lib/mmio.h>
30
31#define BOARD_CSS_GET_PLAT_TYPE(addr) \
32 ((mmio_read_32(addr) & BOARD_CSS_PLAT_ID_REG_ID_MASK) \
33 >> BOARD_CSS_PLAT_ID_REG_ID_SHIFT)
34
35#endif /* __ASSEMBLER__ */
36
37#define MAX_IO_DEVICES 3
38#define MAX_IO_HANDLES 4
39
40/* Reserve the last block of flash for PSCI MEM PROTECT flag */
41#define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
42#define PLAT_ARM_FLASH_IMAGE_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
43
44#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
45#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
46
47/* UART related constants */
48#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE
49#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ
50
51#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE
52#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
53
54#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
55#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
56
57#endif /* SGI_SOC_CSS_DEF_H */