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Stephan Gerhold14fdf072021-12-01 20:01:11 +01001/*
2 * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#ifndef PLATFORM_DEF_H
7#define PLATFORM_DEF_H
8
9#include <plat/common/common_def.h>
10
11/*
12 * There is at least 1 MiB available for BL31. However, at the moment the
13 * "msm8916_entry_point" variable in the data section is read through the
14 * 64 KiB region of the "boot remapper" after reset. For simplicity, limit
15 * the end of the data section (BL31_PROGBITS_LIMIT) to 64 KiB for now and
16 * the overall limit to 128 KiB. This could be increased if needed by placing
17 * the "msm8916_entry_point" variable explicitly in the first 64 KiB of BL31.
18 */
19#define BL31_LIMIT (BL31_BASE + 0x20000) /* 128 KiB */
20#define BL31_PROGBITS_LIMIT (BL31_BASE + 0x10000) /* 64 KiB */
21
22#define CACHE_WRITEBACK_GRANULE U(64)
23#define PLATFORM_STACK_SIZE U(0x1000)
24
25/* CPU topology: single cluster with 4 cores */
26#define PLATFORM_CLUSTER_COUNT U(1)
27#define PLATFORM_MAX_CPUS_PER_CLUSTER U(4)
28#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \
29 PLATFORM_MAX_CPUS_PER_CLUSTER)
30
31/* Power management */
32#define PLATFORM_SYSTEM_COUNT U(1)
33#define PLAT_NUM_PWR_DOMAINS (PLATFORM_SYSTEM_COUNT + \
34 PLATFORM_CLUSTER_COUNT + \
35 PLATFORM_CORE_COUNT)
36#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
37#define PLAT_MAX_RET_STATE U(2)
38#define PLAT_MAX_OFF_STATE U(3)
39
40/* Translation tables */
41#define MAX_MMAP_REGIONS 8
42#define MAX_XLAT_TABLES 4
43
44#define PLAT_PHY_ADDR_SPACE_SIZE (ULL(1) << 32)
45#define PLAT_VIRT_ADDR_SPACE_SIZE (ULL(1) << 32)
46
47/* Timer frequency */
48#define PLAT_SYSCNT_FREQ 19200000
49
50#endif /* PLATFORM_DEF_H */