| Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2015 - 2020, Broadcom |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef CMN_PLAT_DEF_H |
| 8 | #define CMN_PLAT_DEF_H |
| 9 | |
| 10 | /* Print file and line number on assert */ |
| 11 | #define PLAT_LOG_LEVEL_ASSERT LOG_LEVEL_INFO |
| 12 | |
| 13 | /* |
| 14 | * The number of regions like RO(code), coherent and data required by |
| 15 | * different BL stages which need to be mapped in the MMU. |
| 16 | */ |
| 17 | #if USE_COHERENT_MEM |
| 18 | #define CMN_BL_REGIONS 3 |
| 19 | #else |
| 20 | #define CMN_BL_REGIONS 2 |
| 21 | #endif |
| 22 | |
| 23 | /* |
| 24 | * FIP definitions |
| 25 | */ |
| 26 | #define PLAT_FIP_ATTEMPT_OFFSET 0x20000 |
| 27 | #define PLAT_FIP_NUM_ATTEMPTS 128 |
| 28 | |
| 29 | #define PLAT_BRCM_FIP_QSPI_BASE QSPI_BASE_ADDR |
| 30 | #define PLAT_BRCM_FIP_NAND_BASE NAND_BASE_ADDR |
| 31 | #define PLAT_BRCM_FIP_MAX_SIZE 0x01000000 |
| 32 | |
| 33 | #define PLAT_BRCM_FIP_BASE PLAT_BRCM_FIP_QSPI_BASE |
| 34 | #endif |