| Karl Li | 130536e | 2023-04-21 11:43:24 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2023, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef APUSYS_DEVAPC_DEF_H |
| 8 | #define APUSYS_DEVAPC_DEF_H |
| 9 | |
| 10 | #include <lib/mmio.h> |
| 11 | #include "../devapc/apusys_dapc_v1.h" |
| 12 | |
| 13 | /* Control */ |
| 14 | #define SLAVE_VCORE SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 15 | #define SLAVE_RPC SLAVE_FORBID_EXCEPT_D0_SEC_RW_NS_R_D5_NO_PROTECT |
| 16 | #define SLAVE_PCU SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 17 | #define SLAVE_AO_CTRL SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 18 | #define SLAVE_PLL SLAVE_FORBID_EXCEPT_D0_SEC_RW_NS_R_D5_NO_PROTECT |
| 19 | #define SLAVE_ACC SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 20 | #define SLAVE_SEC SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 21 | #define SLAVE_ARE0 SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 22 | #define SLAVE_ARE1 SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 23 | #define SLAVE_ARE2 SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 24 | #define SLAVE_UNKNOWN SLAVE_FORBID_EXCEPT_D5_NO_PROTECT |
| 25 | #define SLAVE_APU_BULK SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 26 | #define SLAVE_AO_BCRM SLAVE_FORBID_EXCEPT_D5_NO_PROTECT |
| 27 | #define SLAVE_AO_DAPC_WRAP SLAVE_FORBID_EXCEPT_D5_NO_PROTECT |
| 28 | #define SLAVE_AO_DAPC_CON SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT |
| 29 | #define SLAVE_RCX_ACX_BULK SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT_D3_SEC_RW |
| 30 | #define SLAVE_ACX0_BCRM SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT_D3_SEC_RW |
| 31 | #define SLAVE_RPCTOP_LITE_ACX0 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 32 | #define SLAVE_ACX1_BCRM SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT_D3_SEC_RW |
| 33 | #define SLAVE_RPCTOP_LITE_ACX1 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 34 | #define SLAVE_RCX_TO_ACX0_0 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT_D3_SEC_RW |
| 35 | #define SLAVE_RCX_TO_ACX0_1 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 36 | #define SLAVE_SAE_TO_ACX0_0 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT_D3_SEC_RW |
| 37 | #define SLAVE_SAE_TO_ACX0_1 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 38 | #define SLAVE_RCX_TO_ACX1_0 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 39 | #define SLAVE_RCX_TO_ACX1_1 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 40 | #define SLAVE_SAE_TO_ACX1_0 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 41 | #define SLAVE_SAE_TO_ACX1_1 SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT |
| 42 | |
| 43 | /* Power Domain: AO */ |
| 44 | #define APU_CTRL_DAPC_AO_SLAVE_NUM_IN_1_DOM (16) |
| 45 | #define APU_CTRL_DAPC_AO_DOM_NUM (16) |
| 46 | #define APU_CTRL_DAPC_AO_SLAVE_NUM (30) |
| 47 | #define DEVAPC_MASK (0x3U) |
| 48 | #define DEVAPC_DOM_SHIFT (2) |
| 49 | |
| 50 | #endif /* APUSYS_DEVAPC_DEF_H */ |