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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <bakery_lock.h>
32#include <mmio.h>
33#include <platform.h>
34#include <arch_helpers.h>
35#include "pm_ipi.h"
36#include "../zynqmp_private.h"
37
38/* IPI message buffers */
39#define IPI_BUFFER_BASEADDR 0xFF990000U
40
41#define IPI_BUFFER_RPU_0_BASE (IPI_BUFFER_BASEADDR + 0x0U)
42#define IPI_BUFFER_RPU_1_BASE (IPI_BUFFER_BASEADDR + 0x200U)
43#define IPI_BUFFER_APU_BASE (IPI_BUFFER_BASEADDR + 0x400U)
44#define IPI_BUFFER_PL_0_BASE (IPI_BUFFER_BASEADDR + 0x600U)
45#define IPI_BUFFER_PL_1_BASE (IPI_BUFFER_BASEADDR + 0x800U)
46#define IPI_BUFFER_PL_2_BASE (IPI_BUFFER_BASEADDR + 0xA00U)
47#define IPI_BUFFER_PL_3_BASE (IPI_BUFFER_BASEADDR + 0xC00U)
48#define IPI_BUFFER_PMU_BASE (IPI_BUFFER_BASEADDR + 0xE00U)
49
50#define IPI_BUFFER_TARGET_RPU_0_OFFSET 0x0U
51#define IPI_BUFFER_TARGET_RPU_1_OFFSET 0x40U
52#define IPI_BUFFER_TARGET_APU_OFFSET 0x80U
53#define IPI_BUFFER_TARGET_PL_0_OFFSET 0xC0U
54#define IPI_BUFFER_TARGET_PL_1_OFFSET 0x100U
55#define IPI_BUFFER_TARGET_PL_2_OFFSET 0x140U
56#define IPI_BUFFER_TARGET_PL_3_OFFSET 0x180U
57#define IPI_BUFFER_TARGET_PMU_OFFSET 0x1C0U
58
59#define IPI_BUFFER_REQ_OFFSET 0x0U
60#define IPI_BUFFER_RESP_OFFSET 0x20U
61
62/* IPI Base Address */
63#define IPI_BASEADDR 0XFF300000
64
65/* APU's IPI registers */
66#define IPI_APU_ISR (IPI_BASEADDR + 0X00000010)
67#define IPI_APU_IER (IPI_BASEADDR + 0X00000018)
68#define IPI_APU_IDR (IPI_BASEADDR + 0X0000001C)
Soren Brinkmannacff8a42016-04-11 15:30:56 -070069#define IPI_APU_IXR_PMU_0_MASK (1 << 16)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080070
71#define IPI_TRIG_OFFSET 0
72#define IPI_OBS_OFFSET 4
73
74/* Power Management IPI interrupt number */
75#define PM_INT_NUM 0
76#define IPI_PMU_PM_INT_BASE (IPI_PMU_0_TRIG + (PM_INT_NUM * 0x1000))
Soren Brinkmannacff8a42016-04-11 15:30:56 -070077#define IPI_PMU_PM_INT_MASK (IPI_APU_IXR_PMU_0_MASK << PM_INT_NUM)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080078#if (PM_INT_NUM < 0 || PM_INT_NUM > 3)
79 #error PM_INT_NUM value out of range
80#endif
81
82#define IPI_APU_MASK 1U
83
Stefan Krsmanovicc5e9f662016-05-20 15:51:08 +020084DEFINE_BAKERY_LOCK(pm_secure_lock);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080085
86const struct pm_ipi apu_ipi = {
87 .mask = IPI_APU_MASK,
88 .base = IPI_BASEADDR,
89 .buffer_base = IPI_BUFFER_APU_BASE,
90};
91
92/**
93 * pm_ipi_init() - Initialize IPI peripheral for communication with PMU
94 *
95 * @return On success, the initialization function must return 0.
96 * Any other return value will cause the framework to ignore
97 * the service
98 *
Soren Brinkmann76fcae32016-03-06 20:16:27 -080099 * Called from pm_setup initialization function
100 */
101int pm_ipi_init(void)
102{
103 bakery_lock_init(&pm_secure_lock);
104
105 /* IPI Interrupts Clear & Disable */
106 mmio_write_32(IPI_APU_ISR, 0xffffffff);
107 mmio_write_32(IPI_APU_IDR, 0xffffffff);
108
109 return 0;
110}
111
112/**
113 * pm_ipi_wait() - wait for pmu to handle request
114 * @proc proc which is waiting for PMU to handle request
115 */
116static enum pm_ret_status pm_ipi_wait(const struct pm_proc *proc)
117{
118 int status;
119
120 /* Wait until previous interrupt is handled by PMU */
121 do {
122 status = mmio_read_32(proc->ipi->base + IPI_OBS_OFFSET) &
123 IPI_PMU_PM_INT_MASK;
124 /* TODO: 1) Use timer to add delay between read attempts */
125 /* TODO: 2) Return PM_RET_ERR_TIMEOUT if this times out */
126 } while (status);
127
128 return PM_RET_SUCCESS;
129}
130
131/**
132 * pm_ipi_send_common() - Sends IPI request to the PMU
133 * @proc Pointer to the processor who is initiating request
134 * @payload API id and call arguments to be written in IPI buffer
135 *
136 * Send an IPI request to the power controller. Caller needs to hold
137 * the 'pm_secure_lock' lock.
138 *
139 * @return Returns status, either success or error+reason
140 */
141static enum pm_ret_status pm_ipi_send_common(const struct pm_proc *proc,
142 uint32_t payload[PAYLOAD_ARG_CNT])
143{
144 unsigned int offset = 0;
145 uintptr_t buffer_base = proc->ipi->buffer_base +
146 IPI_BUFFER_TARGET_PMU_OFFSET +
147 IPI_BUFFER_REQ_OFFSET;
148
149 /* Wait until previous interrupt is handled by PMU */
150 pm_ipi_wait(proc);
151
152 /* Write payload into IPI buffer */
153 for (size_t i = 0; i < PAYLOAD_ARG_CNT; i++) {
154 mmio_write_32(buffer_base + offset, payload[i]);
155 offset += PAYLOAD_ARG_SIZE;
156 }
157 /* Generate IPI to PMU */
158 mmio_write_32(proc->ipi->base + IPI_TRIG_OFFSET, IPI_PMU_PM_INT_MASK);
159
160 return PM_RET_SUCCESS;
161}
162
163/**
164 * pm_ipi_send() - Sends IPI request to the PMU
165 * @proc Pointer to the processor who is initiating request
166 * @payload API id and call arguments to be written in IPI buffer
167 *
168 * Send an IPI request to the power controller.
169 *
170 * @return Returns status, either success or error+reason
171 */
172enum pm_ret_status pm_ipi_send(const struct pm_proc *proc,
173 uint32_t payload[PAYLOAD_ARG_CNT])
174{
175 enum pm_ret_status ret;
176
177 bakery_lock_get(&pm_secure_lock);
178
179 ret = pm_ipi_send_common(proc, payload);
180
181 bakery_lock_release(&pm_secure_lock);
182
183 return ret;
184}
185
186
187/**
188 * pm_ipi_buff_read() - Reads IPI response after PMU has handled interrupt
189 * @proc Pointer to the processor who is waiting and reading response
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700190 * @value Used to return value from IPI buffer element (optional)
191 * @count Number of values to return in @value
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800192 *
193 * @return Returns status, either success or error+reason
194 */
195static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc,
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700196 unsigned int *value, size_t count)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800197{
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700198 size_t i;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800199 uintptr_t buffer_base = proc->ipi->buffer_base +
200 IPI_BUFFER_TARGET_PMU_OFFSET +
201 IPI_BUFFER_RESP_OFFSET;
202
203 pm_ipi_wait(proc);
204
205 /*
206 * Read response from IPI buffer
207 * buf-0: success or error+reason
208 * buf-1: value
209 * buf-2: unused
210 * buf-3: unused
211 */
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700212 for (i = 1; i <= count; i++) {
213 *value = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE));
214 value++;
215 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800216
217 return mmio_read_32(buffer_base);
218}
219
220/**
221 * pm_ipi_send_sync() - Sends IPI request to the PMU
222 * @proc Pointer to the processor who is initiating request
223 * @payload API id and call arguments to be written in IPI buffer
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700224 * @value Used to return value from IPI buffer element (optional)
225 * @count Number of values to return in @value
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800226 *
227 * Send an IPI request to the power controller and wait for it to be handled.
228 *
229 * @return Returns status, either success or error+reason and, optionally,
230 * @value
231 */
232enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
233 uint32_t payload[PAYLOAD_ARG_CNT],
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700234 unsigned int *value, size_t count)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800235{
236 enum pm_ret_status ret;
237
238 bakery_lock_get(&pm_secure_lock);
239
240 ret = pm_ipi_send_common(proc, payload);
241 if (ret != PM_RET_SUCCESS)
242 goto unlock;
243
Soren Brinkmannd6c9e032016-09-22 11:35:47 -0700244 ret = pm_ipi_buff_read(proc, value, count);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800245
246unlock:
247 bakery_lock_release(&pm_secure_lock);
248
249 return ret;
250}