Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | # |
Varun Wadekar | 396530b | 2019-03-01 10:18:35 -0800 | [diff] [blame] | 2 | # Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. |
Varun Wadekar | 8760ec9 | 2018-06-13 14:54:01 -0700 | [diff] [blame] | 3 | # Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 4 | # |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 5 | # SPDX-License-Identifier: BSD-3-Clause |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 6 | # |
| 7 | |
Varun Wadekar | a78bb1b | 2015-08-07 10:03:00 +0530 | [diff] [blame] | 8 | SOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC} |
| 9 | |
Varun Wadekar | a441f72 | 2017-04-26 13:46:11 -0700 | [diff] [blame] | 10 | # dump the state on crash console |
| 11 | CRASH_REPORTING := 1 |
| 12 | $(eval $(call add_define,CRASH_REPORTING)) |
Varun Wadekar | 6077dce | 2016-01-27 11:31:06 -0800 | [diff] [blame] | 13 | |
Varun Wadekar | 38c8022 | 2017-04-26 13:48:19 -0700 | [diff] [blame] | 14 | # enable assert() for release/debug builds |
| 15 | ENABLE_ASSERTIONS := 1 |
Varun Wadekar | a9d5620 | 2018-10-16 16:05:41 -0700 | [diff] [blame] | 16 | PLAT_LOG_LEVEL_ASSERT := 50 |
Varun Wadekar | 96658a9 | 2017-08-03 11:38:32 -0700 | [diff] [blame] | 17 | $(eval $(call add_define,PLAT_LOG_LEVEL_ASSERT)) |
Varun Wadekar | 38c8022 | 2017-04-26 13:48:19 -0700 | [diff] [blame] | 18 | |
Varun Wadekar | a441f72 | 2017-04-26 13:46:11 -0700 | [diff] [blame] | 19 | # enable dynamic memory mapping |
| 20 | PLAT_XLAT_TABLES_DYNAMIC := 1 |
| 21 | $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) |
| 22 | |
Varun Wadekar | 10c32cb | 2020-03-31 18:42:59 -0700 | [diff] [blame] | 23 | # Enable exception handling at EL3 |
| 24 | EL3_EXCEPTION_HANDLING := 1 |
| 25 | GICV2_G0_FOR_EL3 := 1 |
| 26 | |
Varun Wadekar | a441f72 | 2017-04-26 13:46:11 -0700 | [diff] [blame] | 27 | # Enable PSCI v1.0 extended state ID format |
| 28 | PSCI_EXTENDED_STATE_ID := 1 |
| 29 | |
| 30 | # code and read-only data should be put on separate memory pages |
| 31 | SEPARATE_CODE_AND_RODATA := 1 |
| 32 | |
| 33 | # do not use coherent memory |
| 34 | USE_COHERENT_MEM := 0 |
| 35 | |
David Cunado | c5b0c0f | 2017-10-31 23:19:21 +0000 | [diff] [blame] | 36 | # do not enable SVE |
| 37 | ENABLE_SVE_FOR_NS := 0 |
| 38 | |
Varun Wadekar | e0ecdd0 | 2017-08-03 17:17:00 -0700 | [diff] [blame] | 39 | # enable D-cache early during CPU warmboot |
| 40 | WARMBOOT_ENABLE_DCACHE_EARLY := 1 |
| 41 | |
Anthony Zhou | c87bc0c | 2018-04-02 19:34:59 +0800 | [diff] [blame] | 42 | # remove the standard libc |
| 43 | OVERRIDE_LIBC := 1 |
| 44 | |
Varun Wadekar | 8760ec9 | 2018-06-13 14:54:01 -0700 | [diff] [blame] | 45 | # Flag to enable WDT FIQ interrupt handling for Tegra SoCs |
| 46 | # prior to Tegra186 |
Varun Wadekar | 98275da | 2019-01-28 17:00:32 -0800 | [diff] [blame] | 47 | ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING ?= 0 |
Varun Wadekar | 8760ec9 | 2018-06-13 14:54:01 -0700 | [diff] [blame] | 48 | |
Varun Wadekar | 0ed6270 | 2018-06-20 14:30:59 -0700 | [diff] [blame] | 49 | # Flag to allow relocation of BL32 image to TZDRAM during boot |
| 50 | RELOCATE_BL32_IMAGE ?= 0 |
| 51 | |
Varun Wadekar | 087190f | 2020-05-16 22:10:09 -0700 | [diff] [blame] | 52 | # Enable stack protection |
| 53 | ENABLE_STACK_PROTECTOR := strong |
| 54 | |
Varun Wadekar | bef02f0 | 2020-04-17 19:09:21 -0700 | [diff] [blame] | 55 | # Enable SDEI |
| 56 | SDEI_SUPPORT := 1 |
| 57 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 58 | include plat/nvidia/tegra/common/tegra_common.mk |
| 59 | include ${SOC_DIR}/platform_${TARGET_SOC}.mk |
Varun Wadekar | c39b0ba | 2015-07-21 10:16:13 +0530 | [diff] [blame] | 60 | |
Varun Wadekar | 98275da | 2019-01-28 17:00:32 -0800 | [diff] [blame] | 61 | $(eval $(call add_define,ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING)) |
Varun Wadekar | 0ed6270 | 2018-06-20 14:30:59 -0700 | [diff] [blame] | 62 | $(eval $(call add_define,RELOCATE_BL32_IMAGE)) |
Varun Wadekar | 8760ec9 | 2018-06-13 14:54:01 -0700 | [diff] [blame] | 63 | |
Varun Wadekar | c39b0ba | 2015-07-21 10:16:13 +0530 | [diff] [blame] | 64 | # modify BUILD_PLAT to point to SoC specific build directory |
Grant Likely | 388248a | 2020-07-30 08:50:10 +0100 | [diff] [blame] | 65 | BUILD_PLAT := $(abspath ${BUILD_BASE})/${PLAT}/${TARGET_SOC}/${BUILD_TYPE} |
Varun Wadekar | 66231d1 | 2017-06-07 09:57:42 -0700 | [diff] [blame] | 66 | |
Varun Wadekar | 7919a60 | 2017-09-06 17:17:12 -0700 | [diff] [blame] | 67 | # platform cflags (enable signed comparisons, disable stdlib) |
| 68 | TF_CFLAGS += -Wsign-compare -nostdlib |
Anthony Zhou | c87bc0c | 2018-04-02 19:34:59 +0800 | [diff] [blame] | 69 | |
| 70 | # override with necessary libc files for the Tegra platform |
| 71 | override LIBC_SRCS := $(addprefix lib/libc/, \ |
Varun Wadekar | bef02f0 | 2020-04-17 19:09:21 -0700 | [diff] [blame] | 72 | aarch64/setjmp.S \ |
Anthony Zhou | c87bc0c | 2018-04-02 19:34:59 +0800 | [diff] [blame] | 73 | assert.c \ |
| 74 | memcpy.c \ |
| 75 | memmove.c \ |
| 76 | memset.c \ |
| 77 | printf.c \ |
| 78 | putchar.c \ |
| 79 | strlen.c \ |
| 80 | snprintf.c) |
| 81 | |
| 82 | INCLUDES += -Iinclude/lib/libc \ |
| 83 | -Iinclude/lib/libc/$(ARCH) \ |
Varun Wadekar | 4d034c5 | 2019-01-11 14:47:48 -0800 | [diff] [blame] | 84 | |
| 85 | ifneq ($(findstring armlink,$(notdir $(LD))),) |
| 86 | # o suppress warnings for section mismatches, undefined symbols |
| 87 | # o use only those libraries that are specified in the input file |
| 88 | # list to resolve references |
| 89 | # o create a static callgraph of functions |
| 90 | # o resolve undefined symbols to el3_panic |
| 91 | # o include only required sections |
| 92 | TF_LDFLAGS += --diag_suppress=L6314,L6332 --no_scanlib --callgraph |
Varun Wadekar | 4d034c5 | 2019-01-11 14:47:48 -0800 | [diff] [blame] | 93 | TF_LDFLAGS += --keep="*(__pubsub*)" --keep="*(rt_svc_descs*)" --keep="*(*cpu_ops)" |
| 94 | ifeq (${ENABLE_PMF},1) |
| 95 | TF_LDFLAGS += --keep="*(*pmf_svc_descs*)" |
| 96 | endif |
| 97 | endif |