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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Soby Mathew73b7bf92017-05-03 12:58:41 +01002 * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef CSS_SCPI_H
8#define CSS_SCPI_H
Dan Handley9df48042015-03-19 18:58:55 +00009
10#include <stddef.h>
11#include <stdint.h>
12
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000013/*
14 * An SCPI command consists of a header and a payload.
15 * The following structure describes the header. It is 64-bit long.
16 */
17typedef struct {
18 /* Command ID */
19 uint32_t id : 7;
20 /* Set ID. Identifies whether this is a standard or extended command. */
21 uint32_t set : 1;
22 /* Sender ID to match a reply. The value is sender specific. */
23 uint32_t sender : 8;
Antonio Nino Diaz7be01ec2016-02-03 14:41:48 +000024 /* Size of the payload in bytes (0 - 511) */
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000025 uint32_t size : 9;
26 uint32_t reserved : 7;
27 /*
28 * Status indicating the success of a command.
29 * See the enum below.
30 */
31 uint32_t status;
32} scpi_cmd_t;
Dan Handley9df48042015-03-19 18:58:55 +000033
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000034typedef enum {
35 SCPI_SET_NORMAL = 0, /* Normal SCPI commands */
36 SCPI_SET_EXTENDED /* Extended SCPI commands */
37} scpi_set_t;
Dan Handley9df48042015-03-19 18:58:55 +000038
39enum {
40 SCP_OK = 0, /* Success */
41 SCP_E_PARAM, /* Invalid parameter(s) */
42 SCP_E_ALIGN, /* Invalid alignment */
43 SCP_E_SIZE, /* Invalid size */
44 SCP_E_HANDLER, /* Invalid handler or callback */
45 SCP_E_ACCESS, /* Invalid access or permission denied */
46 SCP_E_RANGE, /* Value out of range */
47 SCP_E_TIMEOUT, /* Time out has ocurred */
48 SCP_E_NOMEM, /* Invalid memory area or pointer */
49 SCP_E_PWRSTATE, /* Invalid power state */
50 SCP_E_SUPPORT, /* Feature not supported or disabled */
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000051 SCPI_E_DEVICE, /* Device error */
52 SCPI_E_BUSY, /* Device is busy */
Dan Handley9df48042015-03-19 18:58:55 +000053};
54
55typedef uint32_t scpi_status_t;
56
57typedef enum {
58 SCPI_CMD_SCP_READY = 0x01,
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000059 SCPI_CMD_SET_CSS_POWER_STATE = 0x03,
Jeenu Viswambharanb1f68092016-08-04 12:44:52 +010060 SCPI_CMD_GET_CSS_POWER_STATE = 0x04,
Sandrine Bailleux04b66d82015-03-18 14:52:53 +000061 SCPI_CMD_SYS_POWER_STATE = 0x05
Dan Handley9df48042015-03-19 18:58:55 +000062} scpi_command_t;
63
Jeenu Viswambharanb1f68092016-08-04 12:44:52 +010064/*
65 * Macros to parse SCP response to GET_CSS_POWER_STATE command
66 *
67 * [3:0] : cluster ID
68 * [7:4] : cluster state: 0 = on; 3 = off; rest are reserved
69 * [15:8]: on/off state for individual CPUs in the cluster
70 *
71 * Payload is in little-endian
72 */
73#define CLUSTER_ID(_resp) ((_resp) & 0xf)
74#define CLUSTER_POWER_STATE(_resp) (((_resp) >> 4) & 0xf)
75
76/* Result is a bit mask of CPU on/off states in the cluster */
77#define CPU_POWER_STATE(_resp) (((_resp) >> 8) & 0xff)
78
79/*
80 * For GET_CSS_POWER_STATE, SCP returns the power states of every cluster. The
81 * size of response depends on the number of clusters in the system. The
82 * SCP-to-AP payload contains 2 bytes per cluster. Make sure the response is
83 * large enough to contain power states of a given cluster
84 */
85#define CHECK_RESPONSE(_resp, _clus) \
86 (_resp.size >= (((_clus) + 1) * 2))
87
Dan Handley9df48042015-03-19 18:58:55 +000088typedef enum {
89 scpi_power_on = 0,
90 scpi_power_retention = 1,
91 scpi_power_off = 3,
92} scpi_power_state_t;
93
94typedef enum {
95 scpi_system_shutdown = 0,
96 scpi_system_reboot = 1,
97 scpi_system_reset = 2
98} scpi_system_state_t;
99
Soby Mathew73b7bf92017-05-03 12:58:41 +0100100int scpi_wait_ready(void);
101void scpi_set_css_power_state(unsigned int mpidr,
102 scpi_power_state_t cpu_state,
103 scpi_power_state_t cluster_state,
104 scpi_power_state_t css_state);
Jeenu Viswambharanb1f68092016-08-04 12:44:52 +0100105int scpi_get_css_power_state(unsigned int mpidr, unsigned int *cpu_state_p,
106 unsigned int *cluster_state_p);
Dan Handley9df48042015-03-19 18:58:55 +0000107uint32_t scpi_sys_power_state(scpi_system_state_t system_state);
108
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000109#endif /* CSS_SCPI_H */