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Yann Gautiere6ecc3c2023-03-17 14:02:12 +01001STM32MP2
2========
3
4STM32MP2 is a microprocessor designed by STMicroelectronics
5based on Arm Cortex-A35.
6
Yann Gautier7271ab42023-03-29 17:36:11 +02007More information can be found on `STM32MP2 Series`_ page.
8
Yann Gautiere6ecc3c2023-03-17 14:02:12 +01009For TF-A common configuration of STM32 MPUs, please check
10:ref:`STM32 MPUs` page.
11
12STM32MP2 Versions
13-----------------
14
15The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible:
16
17- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD H264 - 3D GPU AI / NN - LVDS
18- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet 3x CAN FD - H264 - 3D GPU AI / NN - LVDS
19- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet 3x CAN FD - LVDS
20- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet
21
22Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
23
Nicolas Le Bayonb62f54e2024-02-02 18:31:36 +010024- A Basic + Cortex-A35 @ 1.2GHz
25- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz
Yann Gautiere6ecc3c2023-03-17 14:02:12 +010026- D Basic + Cortex-A35 @ 1.5GHz
27- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz
28
Yann Gautier7271ab42023-03-29 17:36:11 +020029The `STM32MP2 part number codification`_ page gives more information about part numbers.
30
Yann Gautiere6ecc3c2023-03-17 14:02:12 +010031Memory mapping
32--------------
33
34::
35
36 0x00000000 +-----------------+
37 | |
38 | ... |
39 | |
40 0x0E000000 +-----------------+ \
41 | BL31 | |
42 +-----------------+ |
43 | ... | |
44 0x0E012000 +-----------------+ |
45 | BL2 DTB | | Embedded SRAM
46 0x0E016000 +-----------------+ |
47 | BL2 | |
48 0x0E040000 +-----------------+ /
49 | |
50 | ... |
51 | |
52 0x40000000 +-----------------+
53 | |
54 | | Devices
55 | |
56 0x80000000 +-----------------+ \
57 | | |
58 | | | Non-secure RAM (DDR)
59 | | |
60 0xFFFFFFFF +-----------------+ /
61
62
63Build Instructions
64------------------
65
66STM32MP2x specific flags
67~~~~~~~~~~~~~~~~~~~~~~~~
68
69Dedicated STM32MP2 build flags:
70
71- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP.
72 | Default: 1
73- | ``STM32MP25``: to select STM32MP25 variant configuration.
74 | Default: 1
75
76To compile the correct DDR driver, one flag must be set among:
77
78- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT.
79 | Default: 0
80- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT.
81 | Default: 0
82- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT.
83 | Default: 0
84
85
86Boot with FIP
87~~~~~~~~~~~~~
Maxime Méréb151f682024-09-13 17:57:58 +020088You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) and retrieve
89DDR PHY firmware before building FIP binary.
Yann Gautiere6ecc3c2023-03-17 14:02:12 +010090
91U-Boot
92______
93
94.. code:: bash
95
96 cd <u-boot_directory>
97 make stm32mp25_defconfig
98 make DEVICE_TREE=stm32mp257f-ev1 all
99
100OP-TEE
101______
102
103.. code:: bash
104
105 cd <optee_directory>
106 make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi-
107 ARCH=arm PLATFORM=stm32mp2 \
108 CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts
109
Maxime Méréb151f682024-09-13 17:57:58 +0200110DDR PHY firmware
111________________
112DDR PHY firmware files may not be delivered inside TF-A repository, especially
113if you build directly from trustedfirmware.org repository. It then needs to be
114retrieved from `STMicroelectronics DDR PHY github`_.
115
116You can either clone the repository to the default directory:
117
118.. code:: bash
119
120 git clone https://github.com/STMicroelectronics/stm32-ddr-phy-binary.git drivers/st/ddr/phy/firmware/bin
121
122Or clone it somewhere else, and add ``STM32MP_DDR_FW_PATH=`` in your make command
123line when building FIP.
124
125TF-A BL2
126________
127To build TF-A BL2 with its STM32 header for SD-card boot:
Yann Gautiere6ecc3c2023-03-17 14:02:12 +0100128
129.. code:: bash
130
131 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
132 STM32MP_DDR4_TYPE=1 SPD=opteed \
133 DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1
134
135For other boot devices, you have to replace STM32MP_SDMMC in the previous command
136with the desired device flag.
137
138
139FIP
140___
141
142.. code:: bash
143
144 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
145 STM32MP_DDR4_TYPE=1 SPD=opteed \
146 DTB_FILE_NAME=stm32mp257f-ev1.dtb \
147 BL33=<u-boot_directory>/u-boot-nodtb.bin \
148 BL33_CFG=<u-boot_directory>/u-boot.dtb \
149 BL32=<optee_directory>/tee-header_v2.bin \
150 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
151 fip
152
Yann Gautier7271ab42023-03-29 17:36:11 +0200153.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html
154.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification
Maxime Méréb151f682024-09-13 17:57:58 +0200155.. _STMicroelectronics DDR PHY github: https://github.com/STMicroelectronics/stm32-ddr-phy-binary
Yann Gautier7271ab42023-03-29 17:36:11 +0200156
Nicolas Le Bayonb62f54e2024-02-02 18:31:36 +0100157*Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved*