Roberto Vargas | e92111a | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | .globl rom_lib_init |
Soby Mathew | fcaf1bd | 2018-10-12 16:40:28 +0100 | [diff] [blame] | 8 | .extern __DATA_RAM_START__, __DATA_ROM_START__, __DATA_RAM_END__ |
Roberto Vargas | e92111a | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 9 | .extern memset, memcpy |
| 10 | |
| 11 | rom_lib_init: |
| 12 | cmp w0, #1 |
| 13 | mov w0, #0 |
| 14 | b.le 1f |
| 15 | ret |
| 16 | |
| 17 | 1: stp x29, x30, [sp, #-16]! |
| 18 | adrp x0, __DATA_RAM_START__ |
Soby Mathew | fcaf1bd | 2018-10-12 16:40:28 +0100 | [diff] [blame] | 19 | adrp x1, __DATA_ROM_START__ |
| 20 | add x1, x1, :lo12:__DATA_ROM_START__ |
| 21 | adrp x2, __DATA_RAM_END__ |
| 22 | add x2, x2, :lo12:__DATA_RAM_END__ |
| 23 | sub x2, x2, x0 |
Roberto Vargas | e92111a | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 24 | bl memcpy |
| 25 | |
Soby Mathew | fcaf1bd | 2018-10-12 16:40:28 +0100 | [diff] [blame] | 26 | adrp x0,__BSS_START__ |
| 27 | add x0, x0, :lo12:__BSS_START__ |
Roberto Vargas | e92111a | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 28 | mov x1, #0 |
Soby Mathew | fcaf1bd | 2018-10-12 16:40:28 +0100 | [diff] [blame] | 29 | adrp x2, __BSS_END__ |
| 30 | add x2, x2, :lo12:__BSS_END__ |
| 31 | sub x2, x2, x0 |
Roberto Vargas | e92111a | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 32 | bl memset |
| 33 | ldp x29, x30, [sp], #16 |
| 34 | |
| 35 | mov w0, #1 |
| 36 | ret |