Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 2 | * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <bl_common.h> |
| 32 | #include <console.h> |
| 33 | #include <debug.h> |
| 34 | #include <platform_tsp.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 35 | #include <plat_arm.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 36 | #include "../zynqmp_private.h" |
| 37 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 38 | #define BL32_END (unsigned long)(&__BL32_END__) |
| 39 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 40 | /* |
| 41 | * The next 2 constants identify the extents of the coherent memory region. |
| 42 | * These addresses are used by the MMU setup code and therefore they must be |
| 43 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 44 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to |
| 45 | * page-aligned addresses. |
| 46 | */ |
| 47 | #define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 48 | #define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 49 | |
| 50 | /******************************************************************************* |
| 51 | * Initialize the UART |
| 52 | ******************************************************************************/ |
| 53 | void tsp_early_platform_setup(void) |
| 54 | { |
| 55 | /* |
| 56 | * Initialize a different console than already in use to display |
| 57 | * messages from TSP |
| 58 | */ |
Soren Brinkmann | 99c0d7b | 2016-06-10 09:57:14 -0700 | [diff] [blame] | 59 | console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(), |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 60 | ZYNQMP_UART_BAUDRATE); |
| 61 | |
| 62 | /* Initialize the platform config for future decision making */ |
| 63 | zynqmp_config_setup(); |
| 64 | } |
| 65 | |
| 66 | /******************************************************************************* |
| 67 | * Perform platform specific setup placeholder |
| 68 | ******************************************************************************/ |
| 69 | void tsp_platform_setup(void) |
| 70 | { |
| 71 | plat_arm_gic_driver_init(); |
| 72 | plat_arm_gic_init(); |
| 73 | } |
| 74 | |
| 75 | /******************************************************************************* |
| 76 | * Perform the very early platform specific architectural setup here. At the |
| 77 | * moment this is only intializes the MMU |
| 78 | ******************************************************************************/ |
| 79 | void tsp_plat_arch_setup(void) |
| 80 | { |
Soren Brinkmann | 6d1ba58 | 2016-07-08 14:45:14 -0700 | [diff] [blame] | 81 | arm_setup_page_tables(BL32_BASE, |
| 82 | BL32_END - BL32_BASE, |
| 83 | BL_CODE_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame^] | 84 | BL_CODE_END, |
Soren Brinkmann | 6d1ba58 | 2016-07-08 14:45:14 -0700 | [diff] [blame] | 85 | BL_RO_DATA_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame^] | 86 | BL_RO_DATA_END, |
Soren Brinkmann | 6d1ba58 | 2016-07-08 14:45:14 -0700 | [diff] [blame] | 87 | BL32_COHERENT_RAM_BASE, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 88 | BL32_COHERENT_RAM_LIMIT |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 89 | ); |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 90 | enable_mmu_el1(0); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 91 | } |