| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
| Soby Mathew | 96a1c6b | 2018-01-15 14:45:33 +0000 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __BOARD_ARM_DEF_H__ |
| 7 | #define __BOARD_ARM_DEF_H__ |
| 8 | |
| 9 | #include <v2m_def.h> |
| 10 | |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 11 | /* |
| 12 | * Required platform porting definitions common to all ARM |
| 13 | * development platforms |
| 14 | */ |
| 15 | |
| 16 | /* Size of cacheable stacks */ |
| Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 17 | #if defined(IMAGE_BL1) |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 18 | #if TRUSTED_BOARD_BOOT |
| 19 | # define PLATFORM_STACK_SIZE 0x1000 |
| 20 | #else |
| 21 | # define PLATFORM_STACK_SIZE 0x440 |
| 22 | #endif |
| Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 23 | #elif defined(IMAGE_BL2) |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 24 | # if TRUSTED_BOARD_BOOT |
| 25 | # define PLATFORM_STACK_SIZE 0x1000 |
| 26 | # else |
| 27 | # define PLATFORM_STACK_SIZE 0x400 |
| 28 | # endif |
| Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 29 | #elif defined(IMAGE_BL2U) |
| Daniel Boulby | ec76950 | 2018-07-20 12:28:55 +0100 | [diff] [blame] | 30 | # define PLATFORM_STACK_SIZE 0x400 |
| Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 31 | #elif defined(IMAGE_BL31) |
| Antonio Nino Diaz | 31c397f | 2018-05-24 09:14:58 +0100 | [diff] [blame] | 32 | #if ENABLE_SPM |
| 33 | # define PLATFORM_STACK_SIZE 0x500 |
| 34 | #elif PLAT_XLAT_TABLES_DYNAMIC |
| Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 35 | # define PLATFORM_STACK_SIZE 0x800 |
| 36 | #else |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 37 | # define PLATFORM_STACK_SIZE 0x400 |
| Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 38 | #endif |
| Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 39 | #elif defined(IMAGE_BL32) |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 40 | # define PLATFORM_STACK_SIZE 0x440 |
| 41 | #endif |
| 42 | |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 43 | #define MAX_IO_DEVICES 3 |
| 44 | #define MAX_IO_HANDLES 4 |
| 45 | |
| 46 | #define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ |
| 47 | |
| Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 48 | /* Reserve the last block of flash for PSCI MEM PROTECT flag */ |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 49 | #define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE |
| Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 50 | #define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 51 | |
| Yatharth Kochar | f11b29a | 2016-02-01 11:04:46 +0000 | [diff] [blame] | 52 | #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE |
| Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 53 | #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) |
| 54 | |
| Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 55 | /* |
| 56 | * Map mem_protect flash region with read and write permissions |
| 57 | */ |
| 58 | #define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ |
| 59 | V2M_FLASH_BLOCK_SIZE, \ |
| 60 | MT_DEVICE | MT_RW | MT_SECURE) |
| Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 61 | |
| 62 | #endif /* __BOARD_ARM_DEF_H__ */ |