blob: 208276c28048461ecfa3453a065b35399fa99318 [file] [log] [blame]
Yidi Lin6fcf07e2025-04-20 20:56:08 +08001/*
2 * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __MTK_BL31_INTERFACE_H__
8#define __MTK_BL31_INTERFACE_H__
9
10#include <stdbool.h>
Yidi Lin92e60072025-04-28 13:15:38 +080011#include <stddef.h>
Yidi Lin6fcf07e2025-04-20 20:56:08 +080012#include <stdint.h>
13
Yidi Lin650a22d2025-05-02 16:33:23 +080014enum mtk_bl31_status {
15 MTK_BL31_STATUS_SUCCESS = 0,
16 MTK_BL31_STATUS_INVALID_PARAM = -1,
17 MTK_BL31_STATUS_NOT_SUPPORTED = -2,
18 MTK_BL31_STATUS_INVALID_RANGE = -3,
19 MTK_BL31_STATUS_PERMISSION_DENY = -4,
20 MTK_BL31_STATUS_LOCK_FAIL = -5,
21};
22
23int mtk_bl31_map_to_sip_error(enum mtk_bl31_status status);
24
25enum mtk_bl31_memory_type {
26 MTK_BL31_DEV_RW_SEC = 0,
27};
28
29int mtk_bl31_mmap_add_dynamic_region(unsigned long long base_pa, size_t size,
30 enum mtk_bl31_memory_type attr);
31int mtk_bl31_mmap_remove_dynamic_region(uintptr_t base_va, size_t size);
32
Yidi Lin6fcf07e2025-04-20 20:56:08 +080033/* UFS definitions */
34enum ufs_mtk_mphy_op {
35 UFS_MPHY_BACKUP = 0,
36 UFS_MPHY_RESTORE,
37};
38
39enum ufs_notify_change_status {
40 PRE_CHANGE,
41 POST_CHANGE,
42};
43
44/* UFS interfaces */
45void ufs_mphy_va09_cg_ctrl(bool enable);
46void ufs_device_reset_ctrl(bool rst_n);
47void ufs_crypto_hie_init(void);
48void ufs_ref_clk_status(uint32_t on, enum ufs_notify_change_status stage);
49void ufs_sram_pwr_ctrl(bool on);
50void ufs_device_pwr_ctrl(bool vcc_on, uint64_t ufs_version);
51void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op);
52void ufs_mtcmos_ctrl(bool on);
53
Yidi Lin44931982025-04-30 13:48:31 +080054/* UFS functions implemented in the public ATF repo */
55int ufs_rsc_ctrl_mem(bool hold);
56int ufs_rsc_ctrl_pmic(bool hold);
57void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version);
58int ufs_spm_mtcmos_power(bool on);
59int ufs_phy_spm_mtcmos_power(bool on);
60bool ufs_is_clk_status_off(void);
61void ufs_set_clk_status(bool on);
62
Yidi Lin92e60072025-04-28 13:15:38 +080063/* EMI interfaces */
64uint64_t emi_mpu_read_addr(unsigned int region, unsigned int offset);
65uint64_t emi_mpu_read_enable(unsigned int region);
66uint64_t emi_mpu_read_aid(unsigned int region, unsigned int aid_shift);
67uint64_t emi_mpu_check_ns_cpu(void);
68enum mtk_bl31_status emi_mpu_set_protection(uint32_t start, uint32_t end,
69 unsigned int region);
70enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region);
71enum mtk_bl31_status emi_kp_clear_violation(unsigned int emiid);
72enum mtk_bl31_status emi_clear_protection(unsigned int region);
73enum mtk_bl31_status emi_clear_md_violation(void);
74uint64_t emi_mpu_check_region_info(unsigned int region, uint64_t *sa, uint64_t *ea);
75uint64_t emi_mpu_page_base_region(void);
76uint64_t emi_mpu_smc_hp_mod_check(void);
77enum mtk_bl31_status slb_clear_violation(unsigned int id);
78enum mtk_bl31_status emi_clear_violation(unsigned int id, unsigned int type);
79enum mtk_bl31_status slc_parity_select(unsigned int id, unsigned int port);
80enum mtk_bl31_status slc_parity_clear(unsigned int id);
81enum mtk_bl31_status emi_mpu_set_aid(unsigned int region, unsigned int num);
82void emi_protection_init(void);
83
Yidi Lin569b38c2025-05-06 14:11:48 +080084/* CPU QoS interfaces */
85void cpu_qos_change_dcc(uint32_t on, uint32_t is_auto);
86void *cpu_qos_handle_cluster_on_event(const void *arg);
87
Yidi Lin44d526f2025-05-06 14:31:54 +080088/* SMMU sid interfaces */
89int smmu_sid_init(void);
90
Yidi Lin6fcf07e2025-04-20 20:56:08 +080091#endif /* __MTK_BL31_INTERFACE_H__ */