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Sandrine Bailleux1fe43362014-07-17 09:56:29 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <bl_common.h>
32#include <console.h>
33#include <platform_tsp.h>
34#include "../juno_def.h"
35#include "../juno_private.h"
36
37/*******************************************************************************
38 * Declarations of linker defined symbols which will help us find the layout
39 * of trusted SRAM
40 ******************************************************************************/
41extern unsigned long __RO_START__;
42extern unsigned long __RO_END__;
Soby Mathew2ae20432015-01-08 18:02:44 +000043extern unsigned long __BL32_END__;
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010044
Soby Mathew2ae20432015-01-08 18:02:44 +000045#if USE_COHERENT_MEM
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010046extern unsigned long __COHERENT_RAM_START__;
47extern unsigned long __COHERENT_RAM_END__;
Soby Mathew2ae20432015-01-08 18:02:44 +000048#endif
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010049
50/*
Soby Mathew2ae20432015-01-08 18:02:44 +000051 * The next 3 constants identify the extents of the code, RO data region and the
52 * limit of the BL3-2 image. These addresses are used by the MMU setup code and
53 * therefore they must be page-aligned. It is the responsibility of the linker
54 * script to ensure that __RO_START__, __RO_END__ & __BL32_END__ linker symbols
55 * refer to page-aligned addresses.
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010056 */
57#define BL32_RO_BASE (unsigned long)(&__RO_START__)
58#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
Soby Mathew2ae20432015-01-08 18:02:44 +000059#define BL32_END (unsigned long)(&__BL32_END__)
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010060
Soby Mathew2ae20432015-01-08 18:02:44 +000061#if USE_COHERENT_MEM
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010062/*
63 * The next 2 constants identify the extents of the coherent memory region.
64 * These addresses are used by the MMU setup code and therefore they must be
65 * page-aligned. It is the responsibility of the linker script to ensure that
66 * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
67 * page-aligned addresses.
68 */
69#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
70#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
Soby Mathew2ae20432015-01-08 18:02:44 +000071#endif
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010072
73/*******************************************************************************
74 * Initialize the UART
75 ******************************************************************************/
76void tsp_early_platform_setup(void)
77{
78 /*
79 * Initialize a different console than already in use to display
80 * messages from TSP
81 */
Soby Mathewf797cea2014-08-21 15:20:27 +010082 console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE);
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010083}
84
85/*******************************************************************************
86 * Perform platform specific setup placeholder
87 ******************************************************************************/
88void tsp_platform_setup(void)
89{
Juan Castillob3286c02014-10-20 12:29:58 +010090 plat_gic_init();
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010091}
92
93/*******************************************************************************
94 * Perform the very early platform specific architectural setup here. At the
95 * moment this only intializes the MMU
96 ******************************************************************************/
97void tsp_plat_arch_setup(void)
98{
99 configure_mmu_el1(BL32_RO_BASE,
Soby Mathew2ae20432015-01-08 18:02:44 +0000100 (BL32_END - BL32_RO_BASE),
Sandrine Bailleux1fe43362014-07-17 09:56:29 +0100101 BL32_RO_BASE,
Soby Mathew2ae20432015-01-08 18:02:44 +0000102 BL32_RO_LIMIT
103#if USE_COHERENT_MEM
104 , BL32_COHERENT_RAM_BASE,
105 BL32_COHERENT_RAM_LIMIT
106#endif
107 );
Sandrine Bailleux1fe43362014-07-17 09:56:29 +0100108}