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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Venkatesh Yadav Abbarapu50dbb082022-04-12 09:21:32 +05302 * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +05307#include <stdbool.h>
8#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
10#include <common/debug.h>
11#include <drivers/generic_delay_timer.h>
12#include <lib/mmio.h>
13#include <lib/xlat_tables/xlat_tables.h>
Jolly Shah6a903472019-08-27 11:23:08 -070014#include <plat_ipi.h>
Jolly Shah0bfd7002019-01-08 11:10:47 -080015#include <plat_private.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016#include <plat/common/platform.h>
17
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +053018#include "pm_api_sys.h"
Soren Brinkmann76fcae32016-03-06 20:16:27 -080019
20/*
21 * Table of regions to map using the MMU.
22 * This doesn't include TZRAM as the 'mem_layout' argument passed to
23 * configure_mmu_elx() will give the available subset of that,
24 */
25const mmap_region_t plat_arm_mmap[] = {
26 { DEVICE0_BASE, DEVICE0_BASE, DEVICE0_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
27 { DEVICE1_BASE, DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
28 { CRF_APB_BASE, CRF_APB_BASE, CRF_APB_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
29 {0}
30};
31
32static unsigned int zynqmp_get_silicon_ver(void)
33{
Soren Brinkmann85863992016-09-16 10:34:47 -070034 static unsigned int ver;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080035
Soren Brinkmann85863992016-09-16 10:34:47 -070036 if (!ver) {
37 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR +
38 ZYNQMP_CSU_VERSION_OFFSET);
39 ver &= ZYNQMP_SILICON_VER_MASK;
40 ver >>= ZYNQMP_SILICON_VER_SHIFT;
41 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080042
43 return ver;
44}
45
46unsigned int zynqmp_get_uart_clk(void)
47{
48 unsigned int ver = zynqmp_get_silicon_ver();
49
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053050 if (ver == ZYNQMP_CSU_VERSION_QEMU) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080051 return 133000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053052 } else {
Siva Durga Prasad Paladugudff07122018-09-04 18:02:25 +053053 return 100000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053054 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080055}
56
Soren Brinkmann76fcae32016-03-06 20:16:27 -080057#if LOG_LEVEL >= LOG_LEVEL_NOTICE
58static const struct {
59 unsigned int id;
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053060 unsigned int ver;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080061 char *name;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053062 bool evexists;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080063} zynqmp_devices[] = {
64 {
65 .id = 0x10,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060066 .name = "XCZU3EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -080067 },
68 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053069 .id = 0x10,
70 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060071 .name = "XCZU3CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053072 },
73 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080074 .id = 0x11,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060075 .name = "XCZU2EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -080076 },
77 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053078 .id = 0x11,
79 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060080 .name = "XCZU2CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053081 },
82 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080083 .id = 0x20,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060084 .name = "XCZU5EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053085 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -080086 },
87 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053088 .id = 0x20,
89 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060090 .name = "XCZU5EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053091 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053092 },
93 {
94 .id = 0x20,
95 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060096 .name = "XCZU5CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053097 },
98 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080099 .id = 0x21,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600100 .name = "XCZU4EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530101 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800102 },
103 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530104 .id = 0x21,
105 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600106 .name = "XCZU4EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530107 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530108 },
109 {
110 .id = 0x21,
111 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600112 .name = "XCZU4CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530113 },
114 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800115 .id = 0x30,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600116 .name = "XCZU7EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530117 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800118 },
119 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530120 .id = 0x30,
121 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600122 .name = "XCZU7EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530123 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530124 },
125 {
126 .id = 0x30,
127 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600128 .name = "XCZU7CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530129 },
130 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800131 .id = 0x38,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600132 .name = "XCZU9EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800133 },
134 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530135 .id = 0x38,
136 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600137 .name = "XCZU9CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530138 },
139 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800140 .id = 0x39,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600141 .name = "XCZU6EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800142 },
143 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530144 .id = 0x39,
145 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600146 .name = "XCZU6CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530147 },
148 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800149 .id = 0x40,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600150 .name = "XCZU11EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800151 },
152 {
153 .id = 0x50,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600154 .name = "XCZU15EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800155 },
156 {
157 .id = 0x58,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600158 .name = "XCZU19EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800159 },
160 {
161 .id = 0x59,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600162 .name = "XCZU17EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800163 },
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530164 {
165 .id = 0x60,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600166 .name = "XCZU28DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530167 },
168 {
169 .id = 0x61,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600170 .name = "XCZU21DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530171 },
172 {
173 .id = 0x62,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600174 .name = "XCZU29DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530175 },
176 {
177 .id = 0x63,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600178 .name = "XCZU23DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530179 },
180 {
181 .id = 0x64,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600182 .name = "XCZU27DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530183 },
184 {
185 .id = 0x65,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600186 .name = "XCZU25DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530187 },
Siva Durga Prasad Paladugu32267282019-03-23 15:26:31 +0530188 {
189 .id = 0x66,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600190 .name = "XCZU39DR",
Siva Durga Prasad Paladugu32267282019-03-23 15:26:31 +0530191 },
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530192 {
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700193 .id = 0x7d,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600194 .name = "XCZU43DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700195 },
196 {
197 .id = 0x78,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600198 .name = "XCZU46DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700199 },
200 {
201 .id = 0x7f,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600202 .name = "XCZU47DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700203 },
204 {
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530205 .id = 0x7b,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600206 .name = "XCZU48DR",
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530207 },
208 {
209 .id = 0x7e,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600210 .name = "XCZU49DR",
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530211 },
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800212};
213
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530214#define ZYNQMP_PL_STATUS_BIT 9
215#define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT)
216#define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK)
217
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600218#define SILICON_ID_XCK26 0x4724093
219
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530220static char *zynqmp_get_silicon_idcode_name(void)
Soren Brinkmanncb366812016-09-22 12:21:11 -0700221{
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530222 uint32_t id, ver, chipid[2];
223 size_t i, j, len;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530224 const char *name = "EG/EV";
Soren Brinkmanncb366812016-09-22 12:21:11 -0700225
Siva Durga Prasad Paladugu6a8933c2018-06-20 17:03:57 +0530226#ifdef IMAGE_BL32
227 /*
228 * For BL32, get the chip id info directly by reading corresponding
229 * registers instead of making pm call. This has limitation
230 * that these registers should be configured to have access
231 * from APU which is default case.
232 */
233 chipid[0] = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
234 chipid[1] = mmio_read_32(EFUSE_BASEADDR + EFUSE_IPDISABLE_OFFSET);
235#else
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530236 if (pm_get_chipid(chipid) != PM_RET_SUCCESS) {
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600237 return "XCZUUNKN";
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530238 }
Siva Durga Prasad Paladugu6a8933c2018-06-20 17:03:57 +0530239#endif
Soren Brinkmanncb366812016-09-22 12:21:11 -0700240
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530241 id = chipid[0] & (ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
242 ZYNQMP_CSU_IDCODE_SVD_MASK);
Soren Brinkmanncb366812016-09-22 12:21:11 -0700243 id >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530244 ver = chipid[1] >> ZYNQMP_EFUSE_IPDISABLE_SHIFT;
Soren Brinkmanncb366812016-09-22 12:21:11 -0700245
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530246 for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
247 if (zynqmp_devices[i].id == id &&
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530248 zynqmp_devices[i].ver == (ver & ZYNQMP_CSU_VERSION_MASK)) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530249 break;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530250 }
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530251 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530252
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600253 if (i >= ARRAY_SIZE(zynqmp_devices)) {
254 if (chipid[0] == SILICON_ID_XCK26) {
255 return "XCK26";
256 } else {
257 return "XCZUUNKN";
258 }
259 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530260
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530261 if (!zynqmp_devices[i].evexists) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530262 return zynqmp_devices[i].name;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530263 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800264
Venkatesh Yadav Abbarapu3a33f932022-05-04 14:27:56 +0530265 if ((ver & ZYNQMP_PL_STATUS_MASK) != 0U) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530266 return zynqmp_devices[i].name;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530267 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530268
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530269 len = strlen(zynqmp_devices[i].name) - 2;
270 for (j = 0; j < strlen(name); j++) {
271 zynqmp_devices[i].name[len] = name[j];
272 len++;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800273 }
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530274 zynqmp_devices[i].name[len] = '\0';
275
276 return zynqmp_devices[i].name;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800277}
278
279static unsigned int zynqmp_get_rtl_ver(void)
280{
281 uint32_t ver;
282
283 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
284 ver &= ZYNQMP_RTL_VER_MASK;
285 ver >>= ZYNQMP_RTL_VER_SHIFT;
286
287 return ver;
288}
289
290static char *zynqmp_print_silicon_idcode(void)
291{
292 uint32_t id, maskid, tmp;
293
294 id = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
295
296 tmp = id;
297 tmp &= ZYNQMP_CSU_IDCODE_XILINX_ID_MASK |
Soren Brinkmann31114132016-05-20 07:05:00 -0700298 ZYNQMP_CSU_IDCODE_FAMILY_MASK;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800299 maskid = ZYNQMP_CSU_IDCODE_XILINX_ID << ZYNQMP_CSU_IDCODE_XILINX_ID_SHIFT |
Soren Brinkmann31114132016-05-20 07:05:00 -0700300 ZYNQMP_CSU_IDCODE_FAMILY << ZYNQMP_CSU_IDCODE_FAMILY_SHIFT;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800301 if (tmp != maskid) {
302 ERROR("Incorrect XILINX IDCODE 0x%x, maskid 0x%x\n", id, maskid);
303 return "UNKN";
304 }
305 VERBOSE("Xilinx IDCODE 0x%x\n", id);
306 return zynqmp_get_silicon_idcode_name();
307}
308
309static unsigned int zynqmp_get_ps_ver(void)
310{
311 uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
312
313 ver &= ZYNQMP_PS_VER_MASK;
314 ver >>= ZYNQMP_PS_VER_SHIFT;
315
316 return ver + 1;
317}
318
319static void zynqmp_print_platform_name(void)
320{
321 unsigned int ver = zynqmp_get_silicon_ver();
322 unsigned int rtl = zynqmp_get_rtl_ver();
323 char *label = "Unknown";
324
325 switch (ver) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800326 case ZYNQMP_CSU_VERSION_QEMU:
327 label = "QEMU";
328 break;
329 case ZYNQMP_CSU_VERSION_SILICON:
330 label = "silicon";
331 break;
Jonathan Wrightff957ed2018-03-14 15:24:00 +0000332 default:
333 /* Do nothing in default case */
334 break;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800335 }
336
Venkatesh Yadav Abbarapu50dbb082022-04-12 09:21:32 +0530337 VERBOSE("TF-A running on %s/%s at 0x%x\n",
338 zynqmp_print_silicon_idcode(), label, BL31_BASE);
Venkatesh Yadav Abbarapud4740e42021-06-17 00:23:52 -0600339 VERBOSE("TF-A running on v%d/RTL%d.%d\n",
340 zynqmp_get_ps_ver(), (rtl & 0xf0) >> 4, rtl & 0xf);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800341}
342#else
343static inline void zynqmp_print_platform_name(void) { }
344#endif
345
Soren Brinkmannb43d9432016-04-18 11:49:42 -0700346unsigned int zynqmp_get_bootmode(void)
347{
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530348 uint32_t r;
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530349 unsigned int ret;
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530350
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530351 ret = pm_mmio_read(CRL_APB_BOOT_MODE_USER, &r);
352
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530353 if (ret != PM_RET_SUCCESS) {
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530354 r = mmio_read_32(CRL_APB_BOOT_MODE_USER);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530355 }
Soren Brinkmannb43d9432016-04-18 11:49:42 -0700356
357 return r & CRL_APB_BOOT_MODE_MASK;
358}
359
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800360void zynqmp_config_setup(void)
361{
Rajan Vaja12be18b2021-03-26 04:16:36 -0700362 uint64_t counter_freq;
363
Jolly Shah6a903472019-08-27 11:23:08 -0700364 /* Configure IPI data for ZynqMP */
365 zynqmp_ipi_config_table_init();
366
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800367 zynqmp_print_platform_name();
Rajan Vaja12be18b2021-03-26 04:16:36 -0700368
369 /* Configure counter frequency */
370 counter_freq = read_cntfrq_el0();
371 if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) {
372 write_cntfrq_el0(plat_get_syscnt_freq2());
373 }
374
Soren Brinkmanne5bdcaa2016-06-22 09:02:56 -0700375 generic_delay_timer_init();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800376}
377
Antonio Nino Diaze82e29c2016-05-19 10:00:28 +0100378unsigned int plat_get_syscnt_freq2(void)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800379{
Soren Brinkmanncfcb1a22016-09-16 10:31:06 -0700380 unsigned int ver = zynqmp_get_silicon_ver();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800381
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530382 if (ver == ZYNQMP_CSU_VERSION_QEMU) {
Edgar E. Iglesias481d2c22019-04-17 15:21:28 +0200383 return 65000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530384 } else {
Siva Durga Prasad Paladugudff07122018-09-04 18:02:25 +0530385 return mmio_read_32(IOU_SCNTRS_BASEFREQ);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530386 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800387}