Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | 4b32e62 | 2018-08-16 16:52:57 +0100 | [diff] [blame] | 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef TEGRA_PLATFORM_H |
| 8 | #define TEGRA_PLATFORM_H |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 9 | |
Antonio Nino Diaz | 4b32e62 | 2018-08-16 16:52:57 +0100 | [diff] [blame] | 10 | #include <cdefs.h> |
Anthony Zhou | 70262ef | 2017-03-22 14:37:04 +0800 | [diff] [blame] | 11 | #include <stdbool.h> |
Marvin Hsu | 589a7e1 | 2017-04-12 20:40:27 +0800 | [diff] [blame] | 12 | #include <utils_def.h> |
| 13 | |
| 14 | /******************************************************************************* |
| 15 | * Tegra major, minor version helper macros |
| 16 | ******************************************************************************/ |
| 17 | #define MAJOR_VERSION_SHIFT U(0x4) |
| 18 | #define MAJOR_VERSION_MASK U(0xF) |
| 19 | #define MINOR_VERSION_SHIFT U(0x10) |
| 20 | #define MINOR_VERSION_MASK U(0xF) |
| 21 | #define CHIP_ID_SHIFT U(8) |
| 22 | #define CHIP_ID_MASK U(0xFF) |
| 23 | #define PRE_SI_PLATFORM_SHIFT U(0x14) |
| 24 | #define PRE_SI_PLATFORM_MASK U(0xF) |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 25 | |
Harvey Hsieh | 6dc0d76 | 2017-04-24 19:35:51 +0800 | [diff] [blame] | 26 | /******************************************************************************* |
Marvin Hsu | 589a7e1 | 2017-04-12 20:40:27 +0800 | [diff] [blame] | 27 | * Tegra chip ID values |
Harvey Hsieh | 6dc0d76 | 2017-04-24 19:35:51 +0800 | [diff] [blame] | 28 | ******************************************************************************/ |
| 29 | #define TEGRA_CHIPID_TEGRA13 U(0x13) |
| 30 | #define TEGRA_CHIPID_TEGRA21 U(0x21) |
| 31 | #define TEGRA_CHIPID_TEGRA18 U(0x18) |
| 32 | |
| 33 | #ifndef __ASSEMBLY__ |
| 34 | |
| 35 | /* |
| 36 | * Tegra chip ID major/minor identifiers |
Varun Wadekar | fc9b91e | 2017-03-10 09:53:37 -0800 | [diff] [blame] | 37 | */ |
| 38 | uint32_t tegra_get_chipid_major(void); |
| 39 | uint32_t tegra_get_chipid_minor(void); |
| 40 | |
| 41 | /* |
Marvin Hsu | 589a7e1 | 2017-04-12 20:40:27 +0800 | [diff] [blame] | 42 | * Tegra chip ID identifiers |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 43 | */ |
Marvin Hsu | 589a7e1 | 2017-04-12 20:40:27 +0800 | [diff] [blame] | 44 | bool tegra_chipid_is_t132(void); |
| 45 | bool tegra_chipid_is_t186(void); |
| 46 | bool tegra_chipid_is_t210(void); |
| 47 | bool tegra_chipid_is_t210_b01(void); |
Varun Wadekar | fdcdfe2 | 2017-04-13 14:12:49 -0700 | [diff] [blame] | 48 | |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 49 | /* |
| 50 | * Tegra platform identifiers |
| 51 | */ |
Anthony Zhou | 70262ef | 2017-03-22 14:37:04 +0800 | [diff] [blame] | 52 | bool tegra_platform_is_silicon(void); |
| 53 | bool tegra_platform_is_qt(void); |
| 54 | bool tegra_platform_is_emulation(void); |
| 55 | bool tegra_platform_is_linsim(void); |
| 56 | bool tegra_platform_is_fpga(void); |
| 57 | bool tegra_platform_is_unit_fpga(void); |
| 58 | bool tegra_platform_is_virt_dev_kit(void); |
Varun Wadekar | 28dcc21 | 2016-07-20 10:28:51 -0700 | [diff] [blame] | 59 | |
Harvey Hsieh | 6dc0d76 | 2017-04-24 19:35:51 +0800 | [diff] [blame] | 60 | #endif /* __ASSEMBLY__ */ |
| 61 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 62 | #endif /* TEGRA_PLATFORM_H */ |