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Soby Mathew5e5c2072014-04-07 15:28:55 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
Soby Mathew0da95932014-07-16 09:23:52 +010030#include <cci400.h>
Soby Mathew5e5c2072014-04-07 15:28:55 +010031#include <gic_v2.h>
Dan Handley1c54d972014-06-20 12:02:01 +010032#include <plat_config.h>
Soby Mathew0da95932014-07-16 09:23:52 +010033#include "platform_def.h"
Soby Mathew5e5c2072014-04-07 15:28:55 +010034
35.section .rodata.gic_reg_name, "aS"
Soby Mathewc1adbbc2014-06-25 10:07:40 +010036gic_regs:
37 .asciz "gic_hppir", "gic_ahppir", "gic_ctlr", ""
38gicd_pend_reg:
39 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
40newline:
41 .asciz "\n"
42spacer:
43 .asciz ":\t\t0x"
Soby Mathew5e5c2072014-04-07 15:28:55 +010044
Soby Mathew5e5c2072014-04-07 15:28:55 +010045 /* ---------------------------------------------
46 * The below macro prints out relevant GIC
47 * registers whenever an unhandled exception is
48 * taken in BL31.
Soby Mathewc1adbbc2014-06-25 10:07:40 +010049 * Clobbers: x0 - x10, x16, sp
Soby Mathew5e5c2072014-04-07 15:28:55 +010050 * ---------------------------------------------
51 */
52 .macro plat_print_gic_regs
Soby Mathewc1adbbc2014-06-25 10:07:40 +010053 adr x0, plat_config
54 ldr w16, [x0, #CONFIG_GICC_BASE_OFFSET]
55 cbz x16, 1f
56 /* gic base address is now in x16 */
57 adr x6, gic_regs /* Load the gic reg list to x6 */
58 /* Load the gic regs to gp regs used by str_in_crash_buf_print */
59 ldr w8, [x16, #GICC_HPPIR]
60 ldr w9, [x16, #GICC_AHPPIR]
61 ldr w10, [x16, #GICC_CTLR]
62 /* Store to the crash buf and print to cosole */
63 bl str_in_crash_buf_print
64
65 /* Print the GICD_ISPENDR regs */
66 add x7, x16, #GICD_ISPENDR
67 adr x4, gicd_pend_reg
68 bl asm_print_str
692:
70 sub x4, x7, x16
71 cmp x4, #0x280
72 b.eq 1f
73 bl asm_print_hex
74 adr x4, spacer
75 bl asm_print_str
76 ldr x4, [x7], #8
77 bl asm_print_hex
78 adr x4, newline
79 bl asm_print_str
80 b 2b
811:
Soby Mathew5e5c2072014-04-07 15:28:55 +010082 .endm
Soby Mathew0da95932014-07-16 09:23:52 +010083
84.section .rodata.cci_reg_name, "aS"
85cci_iface_regs:
86 .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
87
88 /* ------------------------------------------------
89 * The below macro prints out relevant interconnect
90 * registers whenever an unhandled exception is
91 * taken in BL31.
92 * Clobbers: x0 - x9, sp
93 * ------------------------------------------------
94 */
95 .macro plat_print_interconnect_regs
96 adr x6, cci_iface_regs
97 /* Store in x7 the base address of the first interface */
98 mov_imm x7, (CCI400_BASE + SLAVE_IFACE3_OFFSET)
99 ldr w8, [x7, #SNOOP_CTRL_REG]
100 /* Store in x7 the base address of the second interface */
101 mov_imm x7, (CCI400_BASE + SLAVE_IFACE4_OFFSET)
102 ldr w9, [x7, #SNOOP_CTRL_REG]
103 /* Store to the crash buf and print to console */
104 bl str_in_crash_buf_print
105 .endm