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Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03001/*
2 * Copyright (C) 2018 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
6 */
7
8#ifndef __PLAT_MARVELL_H__
9#define __PLAT_MARVELL_H__
10
11#include <cassert.h>
12#include <cpu_data.h>
13#include <stdint.h>
14#include <utils.h>
15#include <xlat_tables.h>
16
17/*
18 * Extern declarations common to Marvell standard platforms
19 */
20extern const mmap_region_t plat_marvell_mmap[];
21
22#define MARVELL_CASSERT_MMAP \
23 CASSERT((ARRAY_SIZE(plat_marvell_mmap) + MARVELL_BL_REGIONS) \
24 <= MAX_MMAP_REGIONS, \
25 assert_max_mmap_regions)
26
27/*
28 * Utility functions common to Marvell standard platforms
29 */
30void marvell_setup_page_tables(uintptr_t total_base,
31 size_t total_size,
32 uintptr_t code_start,
33 uintptr_t code_limit,
34 uintptr_t rodata_start,
35 uintptr_t rodata_limit
36#if USE_COHERENT_MEM
37 , uintptr_t coh_start,
38 uintptr_t coh_limit
39#endif
40);
41
42/* IO storage utility functions */
43void marvell_io_setup(void);
44
45/* Systimer utility function */
46void marvell_configure_sys_timer(void);
47
48/* Topology utility function */
49int marvell_check_mpidr(u_register_t mpidr);
50
51/* BLE utility functions */
52int ble_plat_setup(int *skip);
53void plat_marvell_dram_update_topology(void);
54void ble_plat_pcie_ep_setup(void);
55struct pci_hw_cfg *plat_get_pcie_hw_data(void);
56
57/* BL1 utility functions */
58void marvell_bl1_early_platform_setup(void);
59void marvell_bl1_platform_setup(void);
60void marvell_bl1_plat_arch_setup(void);
61
62/* BL2 utility functions */
63void marvell_bl2_early_platform_setup(meminfo_t *mem_layout);
64void marvell_bl2_platform_setup(void);
65void marvell_bl2_plat_arch_setup(void);
66uint32_t marvell_get_spsr_for_bl32_entry(void);
67uint32_t marvell_get_spsr_for_bl33_entry(void);
68
69/* BL31 utility functions */
Konstantin Porotchkinacb1dc12018-08-19 10:07:35 +030070void marvell_bl31_early_platform_setup(struct bl31_params *from_bl2,
71 uintptr_t soc_fw_config,
72 uintptr_t hw_config,
73 void *plat_params_from_bl2);
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030074void marvell_bl31_platform_setup(void);
75void marvell_bl31_plat_runtime_setup(void);
76void marvell_bl31_plat_arch_setup(void);
77
78/* Power management config to power off the SoC */
79void *plat_marvell_get_pm_cfg(void);
80
81/* Check if MSS AP CM3 firmware contains PM support */
82_Bool is_pm_fw_running(void);
83
84/* Bootrom image recovery utility functions */
85void *plat_marvell_get_skip_image_data(void);
86
87/* FIP TOC validity check */
88int marvell_io_is_toc_valid(void);
89
90/*
91 * PSCI functionality
92 */
93void marvell_psci_arch_init(int ap_idx);
94void plat_marvell_system_reset(void);
95
96/*
Marcin Wojtas0c60c2f2018-03-21 09:59:59 +010097 * Miscellaneous platform SMC routines
98 */
99#ifdef MVEBU_PMU_IRQ_WA
100void mvebu_pmu_interrupt_enable(void);
101void mvebu_pmu_interrupt_disable(void);
102#endif
103
104/*
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +0300105 * Optional functions required in Marvell standard platforms
106 */
107void plat_marvell_io_setup(void);
108int plat_marvell_get_alt_image_source(
109 unsigned int image_id,
110 uintptr_t *dev_handle,
111 uintptr_t *image_spec);
112unsigned int plat_marvell_calc_core_pos(u_register_t mpidr);
113
114const mmap_region_t *plat_marvell_get_mmap(void);
115void marvell_ble_prepare_exit(void);
116void marvell_exit_bootrom(uintptr_t base);
117
118int plat_marvell_early_cpu_powerdown(void);
119#endif /* __PLAT_MARVELL_H__ */