blob: 39bb3325656609377c7a10b25ff5a2ace37bd9ff [file] [log] [blame]
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz1f470022018-03-27 09:39:47 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <bl_common.h>
Antonio Nino Diazecf34712018-07-12 13:38:53 +010010#include <debug.h>
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000011#include <platform_def.h>
12#include <xlat_mmu_helpers.h>
13#include <xlat_tables_defs.h>
14
15#include "../../bl1/bl1_private.h"
16#include "rpi3_private.h"
17
18/* Data structure which holds the extents of the trusted SRAM for BL1 */
19static meminfo_t bl1_tzram_layout;
20
21meminfo_t *bl1_plat_sec_mem_layout(void)
22{
23 return &bl1_tzram_layout;
24}
25
26/*******************************************************************************
27 * Perform any BL1 specific platform actions.
28 ******************************************************************************/
29void bl1_early_platform_setup(void)
30{
31 /* Initialize the console to provide early debug support */
Antonio Nino Diaz1f470022018-03-27 09:39:47 +010032 rpi3_console_init();
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000033
34 /* Allow BL1 to see the whole Trusted RAM */
35 bl1_tzram_layout.total_base = BL_RAM_BASE;
36 bl1_tzram_layout.total_size = BL_RAM_SIZE;
37}
38
39/******************************************************************************
40 * Perform the very early platform specific architecture setup. This only
41 * does basic initialization. Later architectural setup (bl1_arch_setup())
42 * does not do anything platform specific.
43 *****************************************************************************/
44void bl1_plat_arch_setup(void)
45{
46 rpi3_setup_page_tables(bl1_tzram_layout.total_base,
47 bl1_tzram_layout.total_size,
48 BL_CODE_BASE, BL1_CODE_END,
49 BL1_RO_DATA_BASE, BL1_RO_DATA_END
50#if USE_COHERENT_MEM
51 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END
52#endif
53 );
54
55 enable_mmu_el3(0);
56}
57
58void bl1_platform_setup(void)
59{
Antonio Nino Diazecf34712018-07-12 13:38:53 +010060 uint32_t __unused rev;
61 int __unused rc;
62
63 rc = rpi3_vc_hardware_get_board_revision(&rev);
64
65 if (rc == 0) {
66 const char __unused *model, __unused *info;
67
68 switch (rev) {
69 case 0xA02082:
70 model = "Raspberry Pi 3 Model B";
71 info = "(1GB, Sony, UK)";
72 break;
73 case 0xA22082:
74 model = "Raspberry Pi 3 Model B";
75 info = "(1GB, Embest, China)";
76 break;
77 case 0xA020D3:
78 model = "Raspberry Pi 3 Model B+";
79 info = "(1GB, Sony, UK)";
80 break;
81 default:
82 model = "Unknown";
83 info = "(Unknown)";
84 ERROR("rpi3: Unknown board revision 0x%08x\n", rev);
85 break;
86 }
87
88 NOTICE("rpi3: Detected: %s %s [0x%08x]\n", model, info, rev);
89 } else {
90 ERROR("rpi3: Unable to detect board revision\n");
91 }
92
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000093 /* Initialise the IO layer and register platform IO devices */
94 plat_rpi3_io_setup();
95}