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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Sandrine Bailleux27866d82013-10-25 15:33:39 +010031#ifndef __GIC_V3_H__
32#define __GIC_V3_H__
33
Achin Gupta4f6ad662013-10-25 09:08:21 +010034#include <mmio.h>
Dan Handley930ee2e2014-04-17 17:48:52 +010035#include <stdint.h>
36
37
38/* GICv3 Re-distributor interface registers & shifts */
39#define GICR_PCPUBASE_SHIFT 0x11
40#define GICR_TYPER 0x08
41#define GICR_WAKER 0x14
Achin Gupta4f6ad662013-10-25 09:08:21 +010042
Dan Handley930ee2e2014-04-17 17:48:52 +010043/* GICR_WAKER bit definitions */
44#define WAKER_CA (1UL << 2)
45#define WAKER_PS (1UL << 1)
46
47/* GICR_TYPER bit definitions */
48#define GICR_TYPER_AFF_SHIFT 32
49#define GICR_TYPER_AFF_MASK 0xffffffff
50#define GICR_TYPER_LAST (1UL << 4)
51
52/* GICv3 ICC_SRE register bit definitions*/
53#define ICC_SRE_EN (1UL << 3)
54#define ICC_SRE_SRE (1UL << 0)
55
56/*******************************************************************************
57 * GICv3 defintions
58 ******************************************************************************/
Harry Liebeleaec5902013-12-12 13:00:29 +000059#define GICV3_AFFLVL_MASK 0xff
60#define GICV3_AFF0_SHIFT 0
61#define GICV3_AFF1_SHIFT 8
62#define GICV3_AFF2_SHIFT 16
63#define GICV3_AFF3_SHIFT 24
64#define GICV3_AFFINITY_MASK 0xffffffff
65
Dan Handley930ee2e2014-04-17 17:48:52 +010066/*******************************************************************************
67 * Function prototypes
68 ******************************************************************************/
Harry Liebeleaec5902013-12-12 13:00:29 +000069uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr);
70
Dan Handley930ee2e2014-04-17 17:48:52 +010071extern unsigned int read_icc_sre_el1(void);
72extern unsigned int read_icc_sre_el2(void);
73extern unsigned int read_icc_sre_el3(void);
74extern void write_icc_sre_el1(unsigned int);
75extern void write_icc_sre_el2(unsigned int);
76extern void write_icc_sre_el3(unsigned int);
77extern void write_icc_pmr_el1(unsigned int);
78
Achin Gupta4f6ad662013-10-25 09:08:21 +010079/*******************************************************************************
Sandrine Bailleux27866d82013-10-25 15:33:39 +010080 * GIC Redistributor interface accessors
Achin Gupta4f6ad662013-10-25 09:08:21 +010081 ******************************************************************************/
Harry Liebeleaec5902013-12-12 13:00:29 +000082static inline uint32_t gicr_read_waker(uintptr_t base)
Achin Gupta4f6ad662013-10-25 09:08:21 +010083{
84 return mmio_read_32(base + GICR_WAKER);
85}
86
Harry Liebeleaec5902013-12-12 13:00:29 +000087static inline void gicr_write_waker(uintptr_t base, uint32_t val)
Achin Gupta4f6ad662013-10-25 09:08:21 +010088{
89 mmio_write_32(base + GICR_WAKER, val);
Achin Gupta4f6ad662013-10-25 09:08:21 +010090}
Sandrine Bailleux27866d82013-10-25 15:33:39 +010091
Harry Liebeleaec5902013-12-12 13:00:29 +000092static inline uint64_t gicr_read_typer(uintptr_t base)
93{
94 return mmio_read_64(base + GICR_TYPER);
95}
96
97
Sandrine Bailleux27866d82013-10-25 15:33:39 +010098#endif /* __GIC_V3_H__ */