Ghennadi Procopciuc | a9fee05 | 2024-01-30 16:19:47 +0200 | [diff] [blame] | 1 | NXP S32G274A |
| 2 | ============ |
| 3 | |
| 4 | S32G2 is an NXP vehicle network processor combining ASIL D safety, hardware |
| 5 | security, high-performance real-time and application processing and network |
| 6 | acceleration. S32G2 supports the needs of new vehicle architectures: |
| 7 | service-oriented gateways, domain controllers, zonal processors, safety |
| 8 | processors and more. It is equipped with 4 Cortex-A53 cores operating at |
| 9 | 1.0GHz. |
| 10 | |
| 11 | The TF-A includes support for one single S32G2-based board called S32G274ARDB2. |
| 12 | The S32G-VNP-RDB2 is a compact, highly optimized and integrated board |
| 13 | engineering for vehicle service-oriented gateway (SoG), domain control |
| 14 | applications, high-performance processing, safety and security applications. |
| 15 | More details about this board can be found at `s32g274ardb2`_. |
| 16 | |
| 17 | Boot Flow |
| 18 | --------- |
| 19 | |
| 20 | :: |
| 21 | |
| 22 | BootROM -> BL2 (SRAM) -> BL31 (SRAM) -> BL33 (DDR - TODO) |
| 23 | |
| 24 | .. warning:: |
| 25 | This boot flow is a preliminary version that will serve as a foundation for |
| 26 | upcoming S32G2 contributions. The execution will hang after the BL31 stage |
| 27 | due to U-Boot being deployed in SRAM instead of DDR. This issue will be |
| 28 | resolved with the addition of the DDR driver. |
| 29 | |
| 30 | Code Locations |
| 31 | -------------- |
| 32 | |
| 33 | - Downstream TF-A: |
| 34 | `link: <https://github.com/nxp-auto-linux/arm-trusted-firmware>`__ |
| 35 | |
| 36 | - Downstream U-Boot: |
| 37 | `link <https://github.com/nxp-auto-linux/u-boot>`__ |
| 38 | |
| 39 | - Downstream Linux: |
| 40 | `link <https://github.com/nxp-auto-linux/linux>`__ |
| 41 | |
| 42 | How to build |
| 43 | ------------ |
| 44 | |
| 45 | The port currently available on the S32G274ARDB2 platform is in its initial |
| 46 | stage. This means that important drivers like DDR and storage are not yet |
| 47 | available. Consequently, the boot process depends on BootROM to load all TF-A |
| 48 | stages in SRAM. To create a bootable image, the script below should be used. |
| 49 | This script makes use of the ``mkimage`` tool, which is part of the U-Boot drop |
| 50 | for S32G274A SoCs. |
| 51 | |
| 52 | .. code:: bash |
| 53 | |
| 54 | #!/bin/bash -xe |
| 55 | TF_A="${TF_A:-`pwd`}" |
| 56 | UBOOT="${UBOOT:-${TF_A}/../u-boot}" |
| 57 | DEBUG="${DEBUG:-1}" |
| 58 | |
| 59 | FIP_BASE="0x34100000" |
| 60 | |
| 61 | if [ "${DEBUG}" -eq "1" ]; then |
| 62 | BUILD="debug" |
| 63 | else |
| 64 | BUILD="release" |
| 65 | fi |
| 66 | |
| 67 | BOOT_IMAGE="build/s32g274ardb2/${BUILD}/BOOT_IMAGE.bin" |
| 68 | BL2_BIN="build/s32g274ardb2/${BUILD}/bl2.bin" |
| 69 | FIP_BIN="build/s32g274ardb2/${BUILD}/fip.bin" |
| 70 | |
| 71 | # Generate bl2, bl31 and fip image |
| 72 | make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \ |
| 73 | BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" clean |
| 74 | make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \ |
| 75 | BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" bl2 |
| 76 | make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \ |
| 77 | BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" fip |
| 78 | |
| 79 | # Extract BL2 entry |
| 80 | BL2_START="0x$(poetry run memory -p s32g274ardb2 -b debug -f | \ |
| 81 | grep BL2 | awk -F'|' '{print $3}' | xargs)" |
| 82 | # BL2 bin file size in bytes |
| 83 | BL2_SIZE="$(stat -c "%s" "${BL2_BIN}")" |
| 84 | |
| 85 | # Pack bl2.bin and fip.bin by ensuring that the FIP image will start at FIP_BASE |
| 86 | cp -vf "${BL2_BIN}" "${BOOT_IMAGE}" |
| 87 | dd if="${FIP_BIN}" of="${BOOT_IMAGE}" seek="$((FIP_BASE - BL2_START))" bs=1 |
| 88 | |
| 89 | # Build a bootable image by appending the IVT |
| 90 | "${UBOOT}/tools/mkimage" \ |
| 91 | -a "${BL2_START}" \ |
| 92 | -e "${BL2_START}" \ |
| 93 | -T s32ccimage \ |
| 94 | -n "${UBOOT}/u-boot-s32.cfgout" \ |
| 95 | -d "${BOOT_IMAGE}" \ |
| 96 | fip.s32 |
| 97 | |
Ghennadi Procopciuc | ada3410 | 2024-09-12 09:20:08 +0300 | [diff] [blame] | 98 | SoC Errata Workarounds |
| 99 | ---------------------- |
| 100 | |
| 101 | The S32G274A port of the TF-A includes compilation flags that can be used to |
| 102 | control the workaround for the SoC. These flags are used similarly to how the |
| 103 | :ref:`arm_cpu_macros_errata_workarounds` are used. The list of workarounds |
| 104 | includes the following switches: |
| 105 | |
| 106 | - ``ERRATA_S32_051700``: This applies erratum ERR051700 workaround to |
| 107 | SoCs part of the S32 Common Chassis family, and therefore it needs to |
| 108 | be enabled for the S32G and S32R devices. |
| 109 | |
Ghennadi Procopciuc | a9fee05 | 2024-01-30 16:19:47 +0200 | [diff] [blame] | 110 | .. _s32g2: https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32g-vehicle-network-processors/s32g2-processors-for-vehicle-networking:S32G2 |
| 111 | .. _s32g274ardb2: https://www.nxp.com/design/design-center/designs/s32g2-vehicle-networking-reference-design:S32G-VNP-RDB2 |