blob: f20bf93ac3e8e42cfc5c8d73d490c7f12568c398 [file] [log] [blame]
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <assert.h>
10#include <cassert.h>
11#include <common_def.h>
12#include <debug.h>
13#include <errno.h>
14#include <platform_def.h>
15#include <string.h>
16#include <types.h>
17#include <utils.h>
18#include <xlat_tables_v2.h>
19#ifdef AARCH32
20# include "aarch32/xlat_tables_arch.h"
21#else
22# include "aarch64/xlat_tables_arch.h"
23#endif
24#include "xlat_tables_private.h"
25
26/*
27 * Private variables used by the TF
28 */
29static mmap_region_t tf_mmap[MAX_MMAP_REGIONS + 1];
30
31static uint64_t tf_xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
32 __aligned(XLAT_TABLE_SIZE) __section("xlat_table");
33
34static uint64_t tf_base_xlat_table[NUM_BASE_LEVEL_ENTRIES]
35 __aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t));
36
Antonio Nino Diazac998032017-02-27 17:23:54 +000037#if PLAT_XLAT_TABLES_DYNAMIC
38static int xlat_tables_mapped_regions[MAX_XLAT_TABLES];
39#endif /* PLAT_XLAT_TABLES_DYNAMIC */
40
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000041xlat_ctx_t tf_xlat_ctx = {
42
43 .pa_max_address = PLAT_PHY_ADDR_SPACE_SIZE - 1,
44 .va_max_address = PLAT_VIRT_ADDR_SPACE_SIZE - 1,
45
46 .mmap = tf_mmap,
47 .mmap_num = MAX_MMAP_REGIONS,
48
49 .tables = tf_xlat_tables,
50 .tables_num = MAX_XLAT_TABLES,
Antonio Nino Diazac998032017-02-27 17:23:54 +000051#if PLAT_XLAT_TABLES_DYNAMIC
52 .tables_mapped_regions = xlat_tables_mapped_regions,
53#endif /* PLAT_XLAT_TABLES_DYNAMIC */
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000054
55 .base_table = tf_base_xlat_table,
56 .base_table_entries = NUM_BASE_LEVEL_ENTRIES,
57
58 .max_pa = 0,
59 .max_va = 0,
60
61 .next_table = 0,
62
63 .base_level = XLAT_TABLE_LEVEL_BASE,
64
65 .initialized = 0
66};
67
68void mmap_add_region(unsigned long long base_pa, uintptr_t base_va,
Sandrine Bailleux04980a32017-04-19 14:02:23 +010069 size_t size, mmap_attr_t attr)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000070{
71 mmap_region_t mm = {
72 .base_va = base_va,
73 .base_pa = base_pa,
74 .size = size,
75 .attr = attr,
76 };
77 mmap_add_region_ctx(&tf_xlat_ctx, (mmap_region_t *)&mm);
78}
79
80void mmap_add(const mmap_region_t *mm)
81{
82 while (mm->size) {
83 mmap_add_region_ctx(&tf_xlat_ctx, (mmap_region_t *)mm);
84 mm++;
85 }
86}
87
Antonio Nino Diazac998032017-02-27 17:23:54 +000088#if PLAT_XLAT_TABLES_DYNAMIC
89
90int mmap_add_dynamic_region(unsigned long long base_pa,
Sandrine Bailleux04980a32017-04-19 14:02:23 +010091 uintptr_t base_va, size_t size, mmap_attr_t attr)
Antonio Nino Diazac998032017-02-27 17:23:54 +000092{
93 mmap_region_t mm = {
94 .base_va = base_va,
95 .base_pa = base_pa,
96 .size = size,
97 .attr = attr,
98 };
99 return mmap_add_dynamic_region_ctx(&tf_xlat_ctx, &mm);
100}
101
102int mmap_remove_dynamic_region(uintptr_t base_va, size_t size)
103{
104 return mmap_remove_dynamic_region_ctx(&tf_xlat_ctx, base_va, size);
105}
106
107#endif /* PLAT_XLAT_TABLES_DYNAMIC */
108
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000109void init_xlat_tables(void)
110{
111 assert(!is_mmu_enabled());
112 assert(!tf_xlat_ctx.initialized);
113 print_mmap(tf_xlat_ctx.mmap);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100114 tf_xlat_ctx.execute_never_mask =
115 xlat_arch_get_xn_desc(xlat_arch_current_el());
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000116 init_xlation_table(&tf_xlat_ctx);
117 xlat_tables_print(&tf_xlat_ctx);
118
119 assert(tf_xlat_ctx.max_va <= PLAT_VIRT_ADDR_SPACE_SIZE - 1);
120 assert(tf_xlat_ctx.max_pa <= PLAT_PHY_ADDR_SPACE_SIZE - 1);
121
122 init_xlat_tables_arch(tf_xlat_ctx.max_pa);
123}
124
125#ifdef AARCH32
126
127void enable_mmu_secure(unsigned int flags)
128{
129 enable_mmu_arch(flags, tf_xlat_ctx.base_table);
130}
131
132#else
133
134void enable_mmu_el1(unsigned int flags)
135{
136 enable_mmu_arch(flags, tf_xlat_ctx.base_table);
137}
138
139void enable_mmu_el3(unsigned int flags)
140{
141 enable_mmu_arch(flags, tf_xlat_ctx.base_table);
142}
143
144#endif /* AARCH32 */