blob: 115765b13864e3720ee59975b0af4646cb51eb1e [file] [log] [blame]
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +02001/*
2 * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#pragma once
8#include <stdint.h>
9
10#ifndef __DDR_INIT_E3_
11#define __DDR_INIT_E3_
12
13#define RCAR_E3_DDR_VERSION "rev.0.09"
14
15#ifdef ddr_qos_init_setting
16 #define REFRESH_RATE 3900 /* Average periodic refresh interval[ns]. Support 3900,7800 */
17#else
18 #if RCAR_REF_INT == 0
19 #define REFRESH_RATE 3900
20 #elif RCAR_REF_INT == 1
21 #define REFRESH_RATE 7800
22 #else
23 #define REFRESH_RATE 3900
24 #endif
25#endif
26
ldts0a596b42018-11-06 10:17:12 +010027extern int32_t rcar_dram_init(void);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +020028#define INITDRAM_OK (0)
29#define INITDRAM_NG (0xffffffff)
30#define INITDRAM_ERR_I (0xffffffff)
31#define INITDRAM_ERR_O (0xfffffffe)
32#define INITDRAM_ERR_T (0xfffffff0)
33
34#endif /* __DDR_INIT_E3_ */