blob: 79c8b2fdf4a5d49d2528fb1fbc77bb18dff722cd [file] [log] [blame]
John Tsichritzis6deaf9c2018-10-08 17:09:43 +01001/*
2 * Copyright (c) 2019, ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <common/bl_common.h>
10#include <neoverse_zeus.h>
11#include <cpu_macros.S>
12#include <plat_macros.S>
13
14 /* ---------------------------------------------
15 * HW will do the cache maintenance while powering down
16 * ---------------------------------------------
17 */
18func neoverse_zeus_core_pwr_dwn
19 /* ---------------------------------------------
20 * Enable CPU power down bit in power control register
21 * ---------------------------------------------
22 */
23 mrs x0, NEOVERSE_ZEUS_CPUPWRCTLR_EL1
24 orr x0, x0, #NEOVERSE_ZEUS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
25 msr NEOVERSE_ZEUS_CPUPWRCTLR_EL1, x0
26 isb
27 ret
28endfunc neoverse_zeus_core_pwr_dwn
29
30 /*
31 * Errata printing function for Neoverse Zeus. Must follow AAPCS.
32 */
33#if REPORT_ERRATA
34func neoverse_zeus_errata_report
35 ret
36endfunc neoverse_zeus_errata_report
37#endif
38
39 /* ---------------------------------------------
40 * This function provides Neoverse-Zeus specific
41 * register information for crash reporting.
42 * It needs to return with x6 pointing to
43 * a list of register names in ascii and
44 * x8 - x15 having values of registers to be
45 * reported.
46 * ---------------------------------------------
47 */
48.section .rodata.neoverse_zeus_regs, "aS"
49neoverse_zeus_regs: /* The ascii list of register names to be reported */
50 .asciz "cpuectlr_el1", ""
51
52func neoverse_zeus_cpu_reg_dump
53 adr x6, neoverse_zeus_regs
54 mrs x8, NEOVERSE_ZEUS_CPUECTLR_EL1
55 ret
56endfunc neoverse_zeus_cpu_reg_dump
57
58declare_cpu_ops neoverse_zeus, NEOVERSE_ZEUS_MIDR, \
59 CPU_NO_RESET_FUNC, \
60 neoverse_zeus_core_pwr_dwn