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Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __CPUAMU_H__
8#define __CPUAMU_H__
9
10/*******************************************************************************
11 * CPU Activity Monitor Unit register specific definitions.
12 ******************************************************************************/
13#define CPUAMCNTENCLR_EL0 S3_3_C15_C9_7
14#define CPUAMCNTENSET_EL0 S3_3_C15_C9_6
15#define CPUAMCFGR_EL0 S3_3_C15_C10_6
16#define CPUAMUSERENR_EL0 S3_3_C15_C10_7
17
18/* Activity Monitor Event Counter Registers */
19#define CPUAMEVCNTR0_EL0 S3_3_C15_C9_0
20#define CPUAMEVCNTR1_EL0 S3_3_C15_C9_1
21#define CPUAMEVCNTR2_EL0 S3_3_C15_C9_2
22#define CPUAMEVCNTR3_EL0 S3_3_C15_C9_3
23#define CPUAMEVCNTR4_EL0 S3_3_C15_C9_4
24
25/* Activity Monitor Event Type Registers */
26#define CPUAMEVTYPER0_EL0 S3_3_C15_C10_0
27#define CPUAMEVTYPER1_EL0 S3_3_C15_C10_1
28#define CPUAMEVTYPER2_EL0 S3_3_C15_C10_2
29#define CPUAMEVTYPER3_EL0 S3_3_C15_C10_3
30#define CPUAMEVTYPER4_EL0 S3_3_C15_C10_4
31
32#ifndef __ASSEMBLY__
33#include <stdint.h>
34
35uint64_t cpuamu_cnt_read(int idx);
36void cpuamu_cnt_write(int idx, uint64_t val);
37unsigned int cpuamu_read_cpuamcntenset_el0(void);
38unsigned int cpuamu_read_cpuamcntenclr_el0(void);
39void cpuamu_write_cpuamcntenset_el0(unsigned int mask);
40void cpuamu_write_cpuamcntenclr_el0(unsigned int mask);
Dimitris Papastamos1be747f2018-02-14 10:28:36 +000041
42int midr_match(unsigned int cpu_midr);
43void cpuamu_context_save(unsigned int nr_counters);
44void cpuamu_context_restore(unsigned int nr_counters);
45
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +000046#endif /* __ASSEMBLY__ */
47
48#endif /* __CPUAMU_H__ */