blob: e43c7acfcbc905be522e7192924261339257ebf4 [file] [log] [blame]
Soby Mathew5e5c2072014-04-07 15:28:55 +01001/*
Vikram Kanigirifbb13012016-02-15 11:54:14 +00002 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
Soby Mathew5e5c2072014-04-07 15:28:55 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
Dan Handleyea596682015-04-01 17:34:24 +010030#ifndef __PLAT_MACROS_S__
31#define __PLAT_MACROS_S__
32
Dan Handley2b6b5742015-03-19 19:17:53 +000033#include <arm_macros.S>
Vikram Kanigirifbb13012016-02-15 11:54:14 +000034#include <cci_macros.S>
Dan Handley2b6b5742015-03-19 19:17:53 +000035#include <v2m_def.h>
Dan Handleybe234f92014-08-04 16:11:15 +010036#include "../fvp_def.h"
Soby Mathew5e5c2072014-04-07 15:28:55 +010037
Soby Mathew5e5c2072014-04-07 15:28:55 +010038 /* ---------------------------------------------
Dan Handley2b6b5742015-03-19 19:17:53 +000039 * The below required platform porting macro
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010040 * prints out relevant GIC and CCI registers
41 * whenever an unhandled exception is taken in
42 * BL31.
Soby Mathew383c4772014-09-01 12:29:27 +010043 * Clobbers: x0 - x10, x16, x17, sp
Soby Mathew5e5c2072014-04-07 15:28:55 +010044 * ---------------------------------------------
45 */
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010046 .macro plat_crash_print_regs
Dan Handley2b6b5742015-03-19 19:17:53 +000047 /*
48 * Detect if we're using the base memory map or
49 * the legacy VE memory map
50 */
51 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
Soby Mathew383c4772014-09-01 12:29:27 +010052 ldr w16, [x0]
53 /* Extract BLD (12th - 15th bits) from the SYS_ID */
Dan Handley2b6b5742015-03-19 19:17:53 +000054 ubfx x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4
Soby Mathew383c4772014-09-01 12:29:27 +010055 /* Check if VE mmap */
56 cmp w16, #BLD_GIC_VE_MMAP
57 b.eq use_ve_mmap
Soby Mathew12012dd2015-10-26 14:01:53 +000058 /* Assume Base Cortex mmap */
Soby Mathew383c4772014-09-01 12:29:27 +010059 mov_imm x17, BASE_GICC_BASE
60 mov_imm x16, BASE_GICD_BASE
Soby Mathew12012dd2015-10-26 14:01:53 +000061 b print_gic_regs
Soby Mathew383c4772014-09-01 12:29:27 +010062use_ve_mmap:
63 mov_imm x17, VE_GICC_BASE
64 mov_imm x16, VE_GICD_BASE
Soby Mathew12012dd2015-10-26 14:01:53 +000065print_gic_regs:
Dan Handley2b6b5742015-03-19 19:17:53 +000066 arm_print_gic_regs
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010067 print_cci_regs
Soby Mathew0da95932014-07-16 09:23:52 +010068 .endm
Dan Handleyea596682015-04-01 17:34:24 +010069
70#endif /* __PLAT_MACROS_S__ */