Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | #ifndef __ARM_SPM_DEF_H__ |
| 7 | #define __ARM_SPM_DEF_H__ |
| 8 | |
| 9 | #include <arm_def.h> |
| 10 | #include <platform_def.h> |
| 11 | #include <utils_def.h> |
| 12 | #include <xlat_tables_defs.h> |
| 13 | |
| 14 | /* |
| 15 | * If BL31 is placed in DRAM, place the Secure Partition in DRAM right after the |
| 16 | * region used by BL31. If BL31 it is placed in SRAM, put the Secure Partition |
| 17 | * at the base of DRAM. |
| 18 | */ |
| 19 | #define ARM_SP_IMAGE_BASE BL32_BASE |
| 20 | #define ARM_SP_IMAGE_LIMIT BL32_LIMIT |
| 21 | /* The maximum size of the S-EL0 payload can be 3MB */ |
| 22 | #define ARM_SP_IMAGE_SIZE ULL(0x300000) |
| 23 | |
| 24 | #ifdef IMAGE_BL2 |
| 25 | /* SPM Payload memory. Mapped as RW in BL2. */ |
| 26 | #define ARM_SP_IMAGE_MMAP MAP_REGION_FLAT( \ |
| 27 | ARM_SP_IMAGE_BASE, \ |
| 28 | ARM_SP_IMAGE_SIZE, \ |
| 29 | MT_MEMORY | MT_RW | MT_SECURE) |
| 30 | #endif |
| 31 | #ifdef IMAGE_BL31 |
| 32 | /* SPM Payload memory. Mapped as code in S-EL1 */ |
| 33 | #define ARM_SP_IMAGE_MMAP MAP_REGION2( \ |
| 34 | ARM_SP_IMAGE_BASE, \ |
| 35 | ARM_SP_IMAGE_BASE, \ |
| 36 | ARM_SP_IMAGE_SIZE, \ |
| 37 | MT_CODE | MT_SECURE | MT_USER, \ |
| 38 | PAGE_SIZE) |
| 39 | #endif |
| 40 | |
| 41 | /* |
| 42 | * Memory shared between EL3 and S-EL0. It is used by EL3 to push data into |
| 43 | * S-EL0, so it is mapped with RW permission from EL3 and with RO permission |
| 44 | * from S-EL0. Placed after SPM Payload memory. |
| 45 | */ |
| 46 | #define PLAT_SPM_BUF_BASE (ARM_SP_IMAGE_BASE + ARM_SP_IMAGE_SIZE) |
| 47 | #define PLAT_SPM_BUF_SIZE ULL(0x100000) |
| 48 | |
| 49 | #define ARM_SPM_BUF_EL3_MMAP MAP_REGION_FLAT( \ |
| 50 | PLAT_SPM_BUF_BASE, \ |
| 51 | PLAT_SPM_BUF_SIZE, \ |
| 52 | MT_RW_DATA | MT_SECURE) |
| 53 | #define ARM_SPM_BUF_EL0_MMAP MAP_REGION2( \ |
| 54 | PLAT_SPM_BUF_BASE, \ |
| 55 | PLAT_SPM_BUF_BASE, \ |
| 56 | PLAT_SPM_BUF_SIZE, \ |
| 57 | MT_RO_DATA | MT_SECURE | MT_USER,\ |
| 58 | PAGE_SIZE) |
| 59 | |
| 60 | /* |
| 61 | * Memory shared between Normal world and S-EL0 for passing data during service |
| 62 | * requests. Mapped as RW and NS. Placed after the shared memory between EL3 and |
| 63 | * S-EL0. |
| 64 | */ |
| 65 | #define ARM_SP_IMAGE_NS_BUF_BASE (PLAT_SPM_BUF_BASE + PLAT_SPM_BUF_SIZE) |
| 66 | #define ARM_SP_IMAGE_NS_BUF_SIZE ULL(0x10000) |
| 67 | #define ARM_SP_IMAGE_NS_BUF_MMAP MAP_REGION2( \ |
| 68 | ARM_SP_IMAGE_NS_BUF_BASE, \ |
| 69 | ARM_SP_IMAGE_NS_BUF_BASE, \ |
| 70 | ARM_SP_IMAGE_NS_BUF_SIZE, \ |
| 71 | MT_RW_DATA | MT_NS | MT_USER, \ |
| 72 | PAGE_SIZE) |
| 73 | |
| 74 | /* |
| 75 | * RW memory, which uses the remaining Trusted DRAM. Placed after the memory |
| 76 | * shared between Secure and Non-secure worlds. First there is the stack memory |
| 77 | * for all CPUs and then there is the common heap memory. Both are mapped with |
| 78 | * RW permissions. |
| 79 | */ |
| 80 | #define PLAT_SP_IMAGE_STACK_BASE (ARM_SP_IMAGE_NS_BUF_BASE + \ |
| 81 | ARM_SP_IMAGE_NS_BUF_SIZE) |
| 82 | #define PLAT_SP_IMAGE_STACK_PCPU_SIZE ULL(0x2000) |
| 83 | #define ARM_SP_IMAGE_STACK_TOTAL_SIZE (PLATFORM_CORE_COUNT * \ |
| 84 | PLAT_SP_IMAGE_STACK_PCPU_SIZE) |
| 85 | |
| 86 | #define ARM_SP_IMAGE_HEAP_BASE (PLAT_SP_IMAGE_STACK_BASE + \ |
| 87 | ARM_SP_IMAGE_STACK_TOTAL_SIZE) |
| 88 | #define ARM_SP_IMAGE_HEAP_SIZE (ARM_SP_IMAGE_LIMIT - ARM_SP_IMAGE_HEAP_BASE) |
| 89 | |
| 90 | #define ARM_SP_IMAGE_RW_MMAP MAP_REGION2( \ |
| 91 | PLAT_SP_IMAGE_STACK_BASE, \ |
| 92 | PLAT_SP_IMAGE_STACK_BASE, \ |
| 93 | (ARM_SP_IMAGE_LIMIT - \ |
| 94 | PLAT_SP_IMAGE_STACK_BASE), \ |
| 95 | MT_RW_DATA | MT_SECURE | MT_USER,\ |
| 96 | PAGE_SIZE) |
| 97 | |
| 98 | /* Total number of memory regions with distinct properties */ |
| 99 | #define ARM_SP_IMAGE_NUM_MEM_REGIONS 6 |
| 100 | |
Antonio Nino Diaz | 086fbd6 | 2017-11-17 11:48:55 +0000 | [diff] [blame^] | 101 | /* |
| 102 | * Name of the section to put the translation tables used by the S-EL1/S-EL0 |
| 103 | * context of a Secure Partition. |
| 104 | */ |
| 105 | #define PLAT_SP_IMAGE_XLAT_SECTION_NAME "arm_el3_tzc_dram" |
| 106 | |
Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 107 | /* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */ |
| 108 | #define PLAT_SPM_COOKIE_0 ULL(0) |
| 109 | #define PLAT_SPM_COOKIE_1 ULL(0) |
| 110 | |
| 111 | #endif /* __ARM_SPM_DEF_H__ */ |