developer | 6f37fd2 | 2019-05-02 20:02:05 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <pmic_wrap_init.h> |
| 8 | #include <pmic.h> |
| 9 | |
developer | 083fa24 | 2019-08-21 20:50:20 +0800 | [diff] [blame^] | 10 | void bcpu_enable(uint32_t en) |
| 11 | { |
| 12 | pwrap_write(PMIC_VPROC11_OP_EN, 0x1); |
| 13 | if (en) |
| 14 | pwrap_write(PMIC_VPROC11_CON0, 1); |
| 15 | else |
| 16 | pwrap_write(PMIC_VPROC11_CON0, 0); |
| 17 | } |
| 18 | |
| 19 | void bcpu_sram_enable(uint32_t en) |
| 20 | { |
| 21 | pwrap_write(PMIC_VSRAM_PROC11_OP_EN, 0x1); |
| 22 | if (en) |
| 23 | pwrap_write(PMIC_VSRAM_PROC11_CON0, 1); |
| 24 | else |
| 25 | pwrap_write(PMIC_VSRAM_PROC11_CON0, 0); |
| 26 | } |
| 27 | |
developer | 6f37fd2 | 2019-05-02 20:02:05 +0800 | [diff] [blame] | 28 | void wk_pmic_enable_sdn_delay(void) |
| 29 | { |
| 30 | uint32_t con; |
| 31 | |
| 32 | pwrap_write(PMIC_TMA_KEY, 0x9CA7); |
| 33 | pwrap_read(PMIC_PSEQ_ELR11, &con); |
| 34 | con &= ~PMIC_RG_SDN_DLY_ENB; |
| 35 | pwrap_write(PMIC_PSEQ_ELR11, con); |
| 36 | pwrap_write(PMIC_TMA_KEY, 0); |
| 37 | } |
| 38 | |
| 39 | void pmic_power_off(void) |
| 40 | { |
| 41 | pwrap_write(PMIC_PWRHOLD, 0x0); |
| 42 | } |