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Vikram Kanigiri40d468c2014-12-23 01:00:22 +00001/*
Antonio Nino Diaz3207e942017-04-06 14:46:38 +01002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Vikram Kanigiri40d468c2014-12-23 01:00:22 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
32#include <assert.h>
33#include <cci.h>
34#include <debug.h>
35#include <mmio.h>
Juan Castillo7f1f0622014-09-09 09:49:23 +010036#include <stdint.h>
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000037
Juan Castillo7f1f0622014-09-09 09:49:23 +010038static uintptr_t g_cci_base;
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000039static unsigned int g_max_master_id;
40static const int *g_cci_slave_if_map;
41
42#if DEBUG
43static int validate_cci_map(const int *map)
44{
45 unsigned int valid_cci_map = 0;
46 int slave_if_id;
47 int i;
48
49 /* Validate the map */
50 for (i = 0; i <= g_max_master_id; i++) {
51 slave_if_id = map[i];
52
53 if (slave_if_id < 0)
54 continue;
55
56 if (slave_if_id >= CCI_SLAVE_INTERFACE_COUNT) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010057 ERROR("Slave interface ID is invalid\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000058 return 0;
59 }
60
61 if (valid_cci_map & (1 << slave_if_id)) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010062 ERROR("Multiple masters are assigned same slave interface ID\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000063 return 0;
64 }
65 valid_cci_map |= 1 << slave_if_id;
66 }
67
68 if (!valid_cci_map) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010069 ERROR("No master is assigned a valid slave interface\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000070 return 0;
71 }
72
73 return 1;
74}
75#endif /* DEBUG */
76
Juan Castillo7f1f0622014-09-09 09:49:23 +010077void cci_init(uintptr_t cci_base,
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000078 const int *map,
79 unsigned int num_cci_masters)
80{
81 assert(map);
82 assert(cci_base);
83
84 g_cci_base = cci_base;
85
86 /*
87 * Master Id's are assigned from zero, So in an array of size n
88 * the max master id is (n - 1).
89 */
90 g_max_master_id = num_cci_masters - 1;
91
92 assert(validate_cci_map(map));
93 g_cci_slave_if_map = map;
94}
95
96void cci_enable_snoop_dvm_reqs(unsigned int master_id)
97{
98 int slave_if_id;
99
100 assert(g_cci_base);
101 assert(master_id <= g_max_master_id);
102
103 slave_if_id = g_cci_slave_if_map[master_id];
104 assert((slave_if_id < CCI_SLAVE_INTERFACE_COUNT) && (slave_if_id >= 0));
105
106 /*
107 * Enable Snoops and DVM messages, no need for Read/Modify/Write as
108 * rest of bits are write ignore
109 */
110 mmio_write_32(g_cci_base +
111 SLAVE_IFACE_OFFSET(slave_if_id) +
112 SNOOP_CTRL_REG, DVM_EN_BIT | SNOOP_EN_BIT);
113
114 /* Wait for the dust to settle down */
115 while (mmio_read_32(g_cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
116 ;
117}
118
119void cci_disable_snoop_dvm_reqs(unsigned int master_id)
120{
121 int slave_if_id;
122
123 assert(g_cci_base);
124 assert(master_id <= g_max_master_id);
125
126 slave_if_id = g_cci_slave_if_map[master_id];
127 assert((slave_if_id < CCI_SLAVE_INTERFACE_COUNT) && (slave_if_id >= 0));
128
129 /*
130 * Disable Snoops and DVM messages, no need for Read/Modify/Write as
131 * rest of bits are write ignore.
132 */
133 mmio_write_32(g_cci_base +
134 SLAVE_IFACE_OFFSET(slave_if_id) +
135 SNOOP_CTRL_REG, ~(DVM_EN_BIT | SNOOP_EN_BIT));
136
137 /* Wait for the dust to settle down */
138 while (mmio_read_32(g_cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
139 ;
140}
141