blob: 5b9a3cb0bec4435d8cc119903d59ba967ac2e0ea [file] [log] [blame]
Yann Gautier0ed7b2a2021-05-19 18:48:16 +02001/*
2 * Copyright (C) 2021, STMicroelectronics - All Rights Reserved
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef STM32MP1_FIP_DEF_H
8#define STM32MP1_FIP_DEF_H
9
10#define STM32MP_BL2_SIZE U(0x0001B000) /* 108 KB for BL2 */
11#define STM32MP_BL2_DTB_SIZE U(0x00006000) /* 24 KB for DTB */
12#define STM32MP_BL32_SIZE U(0x00019000) /* 100 KB for BL32 */
13#define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
14#define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */
15
16#define STM32MP_BL2_BASE (STM32MP_SEC_SYSRAM_BASE + \
17 STM32MP_SEC_SYSRAM_SIZE - \
18 STM32MP_BL2_SIZE)
19
20#define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \
21 STM32MP_BL2_DTB_SIZE)
22
23#define STM32MP_BL32_DTB_BASE STM32MP_SYSRAM_BASE
24
25#define STM32MP_BL32_BASE (STM32MP_BL32_DTB_BASE + \
26 STM32MP_BL32_DTB_SIZE)
27
28#if defined(IMAGE_BL2)
29#define STM32MP_DTB_SIZE STM32MP_BL2_DTB_SIZE
30#define STM32MP_DTB_BASE STM32MP_BL2_DTB_BASE
31#endif
32#if defined(IMAGE_BL32)
33#define STM32MP_DTB_SIZE STM32MP_BL32_DTB_SIZE
34#define STM32MP_DTB_BASE STM32MP_BL32_DTB_BASE
35#endif
36
37#ifdef AARCH32_SP_OPTEE
38#define STM32MP_OPTEE_BASE STM32MP_SEC_SYSRAM_BASE
39
40#define STM32MP_OPTEE_SIZE (STM32MP_BL2_DTB_BASE - \
41 STM32MP_OPTEE_BASE)
42#endif
43
44#define STM32MP_HW_CONFIG_BASE (STM32MP_BL33_BASE + \
45 STM32MP_BL33_MAX_SIZE)
46
47/*
48 * MAX_MMAP_REGIONS is usually:
49 * BL stm32mp1_mmap size + mmap regions in *_plat_arch_setup
50 */
51#if defined(IMAGE_BL32)
52#define MAX_MMAP_REGIONS 10
53#endif
54
55/*******************************************************************************
56 * STM32MP1 RAW partition offset for MTD devices
57 ******************************************************************************/
58#define STM32MP_NOR_FIP_OFFSET U(0x00080000)
59#define STM32MP_NAND_FIP_OFFSET U(0x00200000)
60
61#endif /* STM32MP1_FIP_DEF_H */