Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef STM32MP_COMMON_H |
| 8 | #define STM32MP_COMMON_H |
| 9 | |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 10 | #include <stdbool.h> |
| 11 | |
Yann Gautier | e97b663 | 2019-04-19 10:48:36 +0200 | [diff] [blame] | 12 | #include <platform_def.h> |
| 13 | |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 14 | /* Functions to save and get boot context address given by ROM code */ |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 15 | void stm32mp_save_boot_ctx_address(uintptr_t address); |
| 16 | uintptr_t stm32mp_get_boot_ctx_address(void); |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 17 | |
Yann Gautier | af19ff9 | 2019-06-04 18:23:10 +0200 | [diff] [blame] | 18 | bool stm32mp_is_single_core(void); |
Lionel Debieve | 0e73d73 | 2019-09-16 12:17:09 +0200 | [diff] [blame] | 19 | bool stm32mp_is_closed_device(void); |
Yann Gautier | af19ff9 | 2019-06-04 18:23:10 +0200 | [diff] [blame] | 20 | |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 21 | /* Return the base address of the DDR controller */ |
| 22 | uintptr_t stm32mp_ddrctrl_base(void); |
| 23 | |
| 24 | /* Return the base address of the DDR PHY */ |
| 25 | uintptr_t stm32mp_ddrphyc_base(void); |
| 26 | |
| 27 | /* Return the base address of the PWR peripheral */ |
| 28 | uintptr_t stm32mp_pwr_base(void); |
| 29 | |
| 30 | /* Return the base address of the RCC peripheral */ |
| 31 | uintptr_t stm32mp_rcc_base(void); |
| 32 | |
Yann Gautier | f540a59 | 2019-05-22 19:13:51 +0200 | [diff] [blame] | 33 | /* Check MMU status to allow spinlock use */ |
| 34 | bool stm32mp_lock_available(void); |
| 35 | |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 36 | /* Get IWDG platform instance ID from peripheral IO memory base address */ |
| 37 | uint32_t stm32_iwdg_get_instance(uintptr_t base); |
| 38 | |
| 39 | /* Return bitflag mask for expected IWDG configuration from OTP content */ |
| 40 | uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); |
| 41 | |
| 42 | #if defined(IMAGE_BL2) |
| 43 | /* Update OTP shadow registers with IWDG configuration from device tree */ |
| 44 | uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); |
| 45 | #endif |
| 46 | |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 47 | /* |
| 48 | * Platform util functions for the GPIO driver |
| 49 | * @bank: Target GPIO bank ID as per DT bindings |
| 50 | * |
| 51 | * Platform shall implement these functions to provide to stm32_gpio |
| 52 | * driver the resource reference for a target GPIO bank. That are |
| 53 | * memory mapped interface base address, interface offset (see below) |
| 54 | * and clock identifier. |
| 55 | * |
| 56 | * stm32_get_gpio_bank_offset() returns a bank offset that is used to |
| 57 | * check DT configuration matches platform implementation of the banks |
| 58 | * description. |
| 59 | */ |
| 60 | uintptr_t stm32_get_gpio_bank_base(unsigned int bank); |
| 61 | unsigned long stm32_get_gpio_bank_clock(unsigned int bank); |
| 62 | uint32_t stm32_get_gpio_bank_offset(unsigned int bank); |
| 63 | |
Yann Gautier | c737405 | 2019-06-04 18:02:37 +0200 | [diff] [blame] | 64 | /* Print CPU information */ |
| 65 | void stm32mp_print_cpuinfo(void); |
| 66 | |
Yann Gautier | 35dc077 | 2019-05-13 18:34:48 +0200 | [diff] [blame] | 67 | /* Print board information */ |
| 68 | void stm32mp_print_boardinfo(void); |
| 69 | |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 70 | /* |
| 71 | * Util for clock gating and to get clock rate for stm32 and platform drivers |
| 72 | * @id: Target clock ID, ID used in clock DT bindings |
| 73 | */ |
| 74 | bool stm32mp_clk_is_enabled(unsigned long id); |
Yann Gautier | e4a3c35 | 2019-02-14 10:53:33 +0100 | [diff] [blame] | 75 | void stm32mp_clk_enable(unsigned long id); |
| 76 | void stm32mp_clk_disable(unsigned long id); |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 77 | unsigned long stm32mp_clk_get_rate(unsigned long id); |
| 78 | |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 79 | /* Initialise the IO layer and register platform IO devices */ |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 80 | void stm32mp_io_setup(void); |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 81 | |
Yann Gautier | e97b663 | 2019-04-19 10:48:36 +0200 | [diff] [blame] | 82 | /* |
| 83 | * Check that the STM32 header of a .stm32 binary image is valid |
| 84 | * @param header: pointer to the stm32 image header |
| 85 | * @param buffer: address of the binary image (payload) |
| 86 | * @return: 0 on success, negative value in case of error |
| 87 | */ |
| 88 | int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer); |
| 89 | |
Yann Gautier | ee8f542 | 2019-02-14 11:13:25 +0100 | [diff] [blame] | 90 | #endif /* STM32MP_COMMON_H */ |