blob: 094a3621e31d3d605e6373c11cee0ef44f40edc7 [file] [log] [blame]
Loh Tien Hock59400a42019-02-04 16:17:24 +08001/*
2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <lib/xlat_tables/xlat_tables.h>
9#include <lib/mmio.h>
10#include <platform_def.h>
11
12unsigned int plat_get_syscnt_freq2(void)
13{
14 return PLAT_SYS_COUNTER_FREQ_IN_TICKS;
15}
16
17unsigned long plat_get_ns_image_entrypoint(void)
18{
19 return PLAT_NS_IMAGE_OFFSET;
20}
21
22/******************************************************************************
23 * Gets SPSR for BL32 entry
24 *****************************************************************************/
25uint32_t plat_get_spsr_for_bl32_entry(void)
26{
27 /*
28 * The Secure Payload Dispatcher service is responsible for
29 * setting the SPSR prior to entry into the BL32 image.
30 */
31 return 0;
32}
33
34/******************************************************************************
35 * Gets SPSR for BL33 entry
36 *****************************************************************************/
37uint32_t plat_get_spsr_for_bl33_entry(void)
38{
39 unsigned long el_status;
40 unsigned int mode;
41 uint32_t spsr;
42
43 /* Figure out what mode we enter the non-secure world in */
44 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
45 el_status &= ID_AA64PFR0_ELX_MASK;
46
47 mode = (el_status) ? MODE_EL2 : MODE_EL1;
48
49 /*
50 * TODO: Consider the possibility of specifying the SPSR in
51 * the FIP ToC and allowing the platform to have a say as
52 * well.
53 */
54 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
55 return spsr;
56}
57