Jiafei Pan | 86a96d9 | 2022-02-18 18:32:18 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2022 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | #include <mmio.h> |
| 9 | |
| 10 | #include <plat_common.h> |
| 11 | |
| 12 | void erratum_a010539(void) |
| 13 | { |
| 14 | if (get_boot_dev() == BOOT_DEVICE_QSPI) { |
| 15 | unsigned int *porsr1 = (void *)(NXP_DCFG_ADDR + |
| 16 | DCFG_PORSR1_OFFSET); |
| 17 | uint32_t val; |
| 18 | |
| 19 | val = (gur_in32(porsr1) & ~PORSR1_RCW_MASK); |
| 20 | mmio_write_32((uint32_t)(NXP_DCSR_DCFG_ADDR + |
| 21 | DCFG_DCSR_PORCR1_OFFSET), htobe32(val)); |
| 22 | /* Erratum need to set '1' to all bits for reserved SCFG register 0x1a8 */ |
| 23 | mmio_write_32((uint32_t)(NXP_SCFG_ADDR + 0x1a8), |
| 24 | htobe32(0xffffffff)); |
| 25 | } |
| 26 | } |