| Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __SOC_ROCKCHIP_RK3399_SUSPEND_H__ |
| 32 | #define __SOC_ROCKCHIP_RK3399_SUSPEND_H__ |
| 33 | #include <dram.h> |
| 34 | |
| 35 | #define KHz (1000) |
| 36 | #define MHz (1000 * KHz) |
| 37 | #define GHz (1000 * MHz) |
| 38 | |
| 39 | #define PI_CA_TRAINING (1 << 0) |
| 40 | #define PI_WRITE_LEVELING (1 << 1) |
| 41 | #define PI_READ_GATE_TRAINING (1 << 2) |
| 42 | #define PI_READ_LEVELING (1 << 3) |
| 43 | #define PI_WDQ_LEVELING (1 << 4) |
| 44 | #define PI_FULL_TRAINING (0xff) |
| 45 | |
| 46 | void dmc_save(void); |
| 47 | __sramfunc void dmc_restore(void); |
| 48 | __sramfunc void sram_regcpy(uintptr_t dst, uintptr_t src, uint32_t num); |
| 49 | |
| 50 | #endif /* __DRAM_H__ */ |