| Sheetal Tigadoli | b015670 | 2020-01-05 14:59:04 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 - 2020, Broadcom |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef PBOOT_HAL_MEMORY_EMMC_DRV_H |
| 8 | #define PBOOT_HAL_MEMORY_EMMC_DRV_H |
| 9 | |
| 10 | #include <drivers/delay_timer.h> |
| 11 | |
| 12 | #include "emmc_chal_types.h" |
| 13 | #include "emmc_chal_sd.h" |
| 14 | #include "emmc_csl_sdprot.h" |
| 15 | #include "emmc_csl_sdcmd.h" |
| 16 | #include "emmc_csl_sd.h" |
| 17 | #include "emmc_brcm_rdb_sd4_top.h" |
| 18 | |
| 19 | #define CLK_SDIO_DIV_52MHZ 0x0 |
| 20 | #define SYSCFG_IOCR4_PAD_10MA 0x38000000 |
| 21 | |
| 22 | #define SDCLK_CNT_PER_MS 52000 |
| 23 | #define BOOT_ACK_TIMEOUT (50 * SDCLK_CNT_PER_MS) |
| 24 | #define BOOT_DATA_TIMEOUT (1000 * SDCLK_CNT_PER_MS) |
| 25 | |
| 26 | #define EMMC_BOOT_OK 0 |
| 27 | #define EMMC_BOOT_ERROR 1 |
| 28 | #define EMMC_BOOT_TIMEOUT 2 |
| 29 | #define EMMC_BOOT_INVALIDIMAGE 3 |
| 30 | #define EMMC_BOOT_NO_CARD 4 |
| 31 | |
| 32 | #define EMMC_USER_AREA 0 |
| 33 | #define EMMC_BOOT_PARTITION1 1 |
| 34 | #define EMMC_BOOT_PARTITION2 2 |
| 35 | #define EMMC_USE_CURRENT_PARTITION 3 |
| 36 | |
| 37 | #define EMMC_BOOT_PARTITION_SIZE (128*1024) |
| 38 | #define EMMC_BLOCK_SIZE 512 |
| 39 | #define EMMC_DMA_SIZE (4*1024) |
| 40 | |
| 41 | /* |
| 42 | * EMMC4.3 definitions |
| 43 | * Table 6 EXT_CSD access mode |
| 44 | * Access |
| 45 | * Bits Access Name Operation |
| 46 | * 00 Command Set The command set is changed according to the Cmd Set field of |
| 47 | * the argument |
| 48 | * 01 Set Bits The bits in the pointed uint8_t are set, |
| 49 | * according to the 1 bits in the Value field. |
| 50 | * 10 Clear Bits The bits in the pointed uint8_t are cleared, |
| 51 | * according to the 1 bits in the Value field. |
| 52 | * 11 Write Byte The Value field is written into the pointed uint8_t. |
| 53 | */ |
| 54 | |
| 55 | #define SDIO_HW_EMMC_EXT_CSD_WRITE_BYTE 0X03000000 |
| 56 | |
| 57 | /* Boot bus width1 BOOT_BUS_WIDTH 1 R/W [177] */ |
| 58 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_BUS_WIDTH_OFFSET 0X00B10000 |
| 59 | |
| 60 | /* Boot configuration BOOT_CONFIG 1 R/W [179] */ |
| 61 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_CONFIG_OFFSET 0X00B30000 |
| 62 | |
| 63 | /* Bus width mode BUS_WIDTH 1 WO [183] */ |
| 64 | #define SDIO_HW_EMMC_EXT_CSD_BUS_WIDTH_OFFSET 0X00B70000 |
| 65 | |
| 66 | /* |
| 67 | * Bit 6: BOOT_ACK (non-volatile) |
| 68 | * 0x0 : No boot acknowledge sent (default) |
| 69 | * 0x1 : Boot acknowledge sent during boot operation |
| 70 | * Bit[5:3] : BOOT_PARTITION_ENABLE (non-volatile) |
| 71 | * User selects boot data that will be sent to master |
| 72 | * 0x0 : Device not boot enabled (default) |
| 73 | * 0x1 : Boot partition 1 enabled for boot |
| 74 | * 0x2 : Boot partition 2 enabled for boot |
| 75 | * 0x3-0x6 : Reserved |
| 76 | * 0x7 : User area enabled for boot |
| 77 | * Bit[2:0] : BOOT_PARTITION_ACCESS |
| 78 | * User selects boot partition for read and write operation |
| 79 | * 0x0 : No access to boot partition (default) |
| 80 | * 0x1 : R/W boot partition 1 |
| 81 | * 0x2 : R/W boot partition 2 |
| 82 | * 0x3-0x7 : Reserved |
| 83 | */ |
| 84 | |
| 85 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_BOOT1 0X00000100 |
| 86 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_BOOT2 0X00000200 |
| 87 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_USER 0X00000000 |
| 88 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_BOOT1 0X00004800 |
| 89 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_BOOT2 0X00005000 |
| 90 | #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_USER 0X00007800 |
| 91 | |
| 92 | #define SD_US_DELAY(x) udelay(x) |
| 93 | |
| 94 | #endif |